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https://github.com/RPCS3/llvm-mirror.git
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GlobalISel: Fix narrowScalar for G_ANYEXT results
This is nearly the same as G_ZEXT.
This commit is contained in:
Matt Arsenault
Matt Arsenault
parent
222988e058
commit
7a99ca5220
@ -680,7 +680,8 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
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MI.eraseFromParent();
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return Legalized;
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}
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case TargetOpcode::G_ZEXT: {
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case TargetOpcode::G_ZEXT:
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case TargetOpcode::G_ANYEXT: {
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if (TypeIdx != 0)
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return UnableToLegalize;
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@ -689,13 +690,18 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
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if (SizeOp0 % SizeOp1 != 0)
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return UnableToLegalize;
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Register PadReg;
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if (MI.getOpcode() == TargetOpcode::G_ZEXT)
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PadReg = MIRBuilder.buildConstant(SrcTy, 0).getReg(0);
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else
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PadReg = MIRBuilder.buildUndef(SrcTy).getReg(0);
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// Generate a merge where the bottom bits are taken from the source, and
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// zero everything else.
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Register ZeroReg = MIRBuilder.buildConstant(SrcTy, 0).getReg(0);
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// zero/impdef everything else.
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unsigned NumParts = SizeOp0 / SizeOp1;
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SmallVector<Register, 4> Srcs = {MI.getOperand(1).getReg()};
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for (unsigned Part = 1; Part < NumParts; ++Part)
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Srcs.push_back(ZeroReg);
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Srcs.push_back(PadReg);
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MIRBuilder.buildMerge(MI.getOperand(0).getReg(), Srcs);
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MI.eraseFromParent();
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return Legalized;
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@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_anyext_s32_to_s64
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@ -282,8 +282,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s32_to_s128
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[COPY]](s32)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s128)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s128)
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%0:_(s32) = COPY $vgpr0
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%1:_(s128) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -297,8 +298,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s32_to_s256
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s256) = G_ANYEXT [[COPY]](s32)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s256)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s256)
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%0:_(s32) = COPY $vgpr0
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%1:_(s256) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -312,8 +314,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s32_to_s512
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s512) = G_ANYEXT [[COPY]](s32)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s512)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s512)
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%0:_(s32) = COPY $vgpr0
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%1:_(s512) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -327,8 +330,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s32_to_s1024
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s1024) = G_ANYEXT [[COPY]](s32)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s1024)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s1024)
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%0:_(s32) = COPY $vgpr0
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%1:_(s1024) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -342,8 +346,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s64_to_s128
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[COPY]](s64)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s128)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s128)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s128) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -357,8 +362,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s64_to_s256
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s256) = G_ANYEXT [[COPY]](s64)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s256)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s256)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s256) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -372,8 +378,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s64_to_s512
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s512) = G_ANYEXT [[COPY]](s64)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s512)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s512)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s512) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -387,8 +394,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s64_to_s1024
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s1024) = G_ANYEXT [[COPY]](s64)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s1024)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s1024)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s1024) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -413,8 +421,9 @@ body: |
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; CHECK-LABEL: name: test_anyext_s128_to_s256
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; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s256) = G_ANYEXT [[COPY]](s128)
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; CHECK: S_ENDPGM 0, implicit [[ANYEXT]](s256)
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; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s128), [[DEF]](s128)
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; CHECK: S_ENDPGM 0, implicit [[MV]](s256)
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%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(s256) = G_ANYEXT %0
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S_ENDPGM 0, implicit %1
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@ -330,35 +330,36 @@ body: |
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[COPY]](s32)
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; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[ANYEXT]](s128)
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C]]
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[AND]](s64), [[AND1]](s64)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32)
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; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[DEF]](s32), [[DEF]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[MV]], [[C]]
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[MV1]], [[C1]]
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; CHECK: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[AND]](s64), [[AND1]](s64)
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
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; CHECK: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C2]](s64), [[C1]](s64)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV1]](s128)
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; CHECK: [[MV3:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C2]](s64), [[C1]](s64)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV3]](s128)
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; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
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; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[MV]](s128)
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; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[MV2]](s128)
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; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C3]]
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; CHECK: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC]]
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; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C3]]
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; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C4]]
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB1]](s32)
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; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32)
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32)
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; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL1]]
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; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[SUB]](s32)
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; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32)
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; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C1]]
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; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]]
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; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV3]], [[SELECT1]]
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; CHECK: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[MV]](s128)
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; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[UV4]], [[SELECT]]
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; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[UV5]], [[SELECT2]]
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; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]]
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; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[MV2]](s128)
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; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[UV2]], [[SELECT]]
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; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[UV3]], [[SELECT2]]
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; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 30
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; CHECK: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C5]](s64), [[C1]](s64)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[MV2]](s128)
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; CHECK: [[MV4:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C5]](s64), [[C1]](s64)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[MV4]](s128)
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; CHECK: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[TRUNC1]], [[C3]]
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; CHECK: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC1]]
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; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC1]](s32), [[C3]]
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; CHECK: [[OR4:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[SELECT3]]
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; CHECK: [[OR5:%[0-9]+]]:_(s64) = G_OR [[OR2]], [[SELECT5]]
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; CHECK: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 45
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; CHECK: [[MV3:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C6]](s64), [[C1]](s64)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[MV3]](s128)
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; CHECK: [[MV5:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C6]](s64), [[C1]](s64)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[MV5]](s128)
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; CHECK: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC2]], [[C3]]
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; CHECK: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC2]]
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; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC2]](s32), [[C3]]
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@ -391,8 +392,8 @@ body: |
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; CHECK: [[OR7:%[0-9]+]]:_(s64) = G_OR [[OR4]], [[SELECT6]]
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; CHECK: [[OR8:%[0-9]+]]:_(s64) = G_OR [[OR5]], [[SELECT8]]
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; CHECK: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 60
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; CHECK: [[MV4:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C7]](s64), [[C1]](s64)
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; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[MV4]](s128)
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; CHECK: [[MV6:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C7]](s64), [[C1]](s64)
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; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[MV6]](s128)
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; CHECK: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[TRUNC3]], [[C3]]
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; CHECK: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC3]]
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; CHECK: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC3]](s32), [[C3]]
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@ -408,8 +409,8 @@ body: |
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; CHECK: [[OR10:%[0-9]+]]:_(s64) = G_OR [[OR7]], [[SELECT9]]
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; CHECK: [[OR11:%[0-9]+]]:_(s64) = G_OR [[OR8]], [[SELECT11]]
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; CHECK: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 75
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; CHECK: [[MV5:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C8]](s64), [[C1]](s64)
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; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[MV5]](s128)
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; CHECK: [[MV7:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C8]](s64), [[C1]](s64)
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; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[MV7]](s128)
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; CHECK: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[TRUNC4]], [[C3]]
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; CHECK: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC4]]
|
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; CHECK: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC4]](s32), [[C3]]
|
||||
@ -425,8 +426,8 @@ body: |
|
||||
; CHECK: [[OR13:%[0-9]+]]:_(s64) = G_OR [[OR10]], [[SELECT12]]
|
||||
; CHECK: [[OR14:%[0-9]+]]:_(s64) = G_OR [[OR11]], [[SELECT14]]
|
||||
; CHECK: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 90
|
||||
; CHECK: [[MV6:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C9]](s64), [[C1]](s64)
|
||||
; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[MV6]](s128)
|
||||
; CHECK: [[MV8:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C9]](s64), [[C1]](s64)
|
||||
; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[MV8]](s128)
|
||||
; CHECK: [[SUB10:%[0-9]+]]:_(s32) = G_SUB [[TRUNC5]], [[C3]]
|
||||
; CHECK: [[SUB11:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC5]]
|
||||
; CHECK: [[ICMP10:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC5]](s32), [[C3]]
|
||||
@ -442,8 +443,8 @@ body: |
|
||||
; CHECK: [[OR16:%[0-9]+]]:_(s64) = G_OR [[OR13]], [[SELECT15]]
|
||||
; CHECK: [[OR17:%[0-9]+]]:_(s64) = G_OR [[OR14]], [[SELECT17]]
|
||||
; CHECK: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 105
|
||||
; CHECK: [[MV7:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C10]](s64), [[C1]](s64)
|
||||
; CHECK: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[MV7]](s128)
|
||||
; CHECK: [[MV9:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C10]](s64), [[C1]](s64)
|
||||
; CHECK: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[MV9]](s128)
|
||||
; CHECK: [[SUB12:%[0-9]+]]:_(s32) = G_SUB [[TRUNC6]], [[C3]]
|
||||
; CHECK: [[SUB13:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC6]]
|
||||
; CHECK: [[ICMP12:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC6]](s32), [[C3]]
|
||||
@ -458,24 +459,24 @@ body: |
|
||||
; CHECK: [[SELECT20:%[0-9]+]]:_(s64) = G_SELECT [[ICMP13]](s1), [[OR17]], [[SELECT19]]
|
||||
; CHECK: [[OR19:%[0-9]+]]:_(s64) = G_OR [[OR16]], [[SELECT18]]
|
||||
; CHECK: [[OR20:%[0-9]+]]:_(s64) = G_OR [[OR17]], [[SELECT20]]
|
||||
; CHECK: [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16), [[UV8:%[0-9]+]]:_(s16), [[UV9:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR19]](s64)
|
||||
; CHECK: [[UV10:%[0-9]+]]:_(s16), [[UV11:%[0-9]+]]:_(s16), [[UV12:%[0-9]+]]:_(s16), [[UV13:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR20]](s64)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV6]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV7]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV8]](s16)
|
||||
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV9]](s16)
|
||||
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV10]](s16)
|
||||
; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[UV11]](s16)
|
||||
; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[UV12]](s16)
|
||||
; CHECK: [[ANYEXT8:%[0-9]+]]:_(s32) = G_ANYEXT [[UV13]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT2]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT3]](s32)
|
||||
; CHECK: $vgpr3 = COPY [[ANYEXT4]](s32)
|
||||
; CHECK: $vgpr4 = COPY [[ANYEXT5]](s32)
|
||||
; CHECK: $vgpr5 = COPY [[ANYEXT6]](s32)
|
||||
; CHECK: $vgpr6 = COPY [[ANYEXT7]](s32)
|
||||
; CHECK: $vgpr7 = COPY [[ANYEXT8]](s32)
|
||||
; CHECK: [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR19]](s64)
|
||||
; CHECK: [[UV8:%[0-9]+]]:_(s16), [[UV9:%[0-9]+]]:_(s16), [[UV10:%[0-9]+]]:_(s16), [[UV11:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR20]](s64)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV6]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV7]](s16)
|
||||
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV8]](s16)
|
||||
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV9]](s16)
|
||||
; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[UV10]](s16)
|
||||
; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[UV11]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
|
||||
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32)
|
||||
; CHECK: $vgpr4 = COPY [[ANYEXT4]](s32)
|
||||
; CHECK: $vgpr5 = COPY [[ANYEXT5]](s32)
|
||||
; CHECK: $vgpr6 = COPY [[ANYEXT6]](s32)
|
||||
; CHECK: $vgpr7 = COPY [[ANYEXT7]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s8) = G_TRUNC %0
|
||||
%2:_(s1), %3:_(s1), %4:_(s1), %5:_(s1), %6:_(s1), %7:_(s1), %8:_(s1), %9:_(s1) = G_UNMERGE_VALUES %1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user