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Revert my previous patch to ABCD and fix things the right way. There are two problems addressed
here: 1) We need to avoid processing sigma nodes as phi nodes for constraint generation. 2) We need to generate constraints for comparisons against constants properly. This includes our first working ABCD test! llvm-svn: 86498
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@ -412,7 +412,9 @@ class ABCD : public FunctionPass {
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/// If PN_op1 and PN_o2 are different from NULL, create a constraint
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/// PN_op2 -> PN_op1 with value. In case any of them is NULL, replace
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/// with the respective V_op#, if V_op# is a ConstantInt.
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void createConstraintSigSig(PHINode *SIG_op1, PHINode *SIG_op2, APInt value);
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void createConstraintSigSig(PHINode *SIG_op1, PHINode *SIG_op2,
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ConstantInt* V_op1, ConstantInt* V_op2,
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APInt value);
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/// Returns the sigma representing the Instruction I in BasicBlock BB.
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/// Returns NULL in case there is no sigma for this Instruction in this
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@ -735,25 +737,27 @@ void ABCD::createConstraintCmpInst(ICmpInst *ICI, TerminatorInst *TI) {
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APInt Zero = APInt::getNullValue(width);
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CmpInst::Predicate Pred = ICI->getPredicate();
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ConstantInt* CI1 = dyn_cast<ConstantInt>(V_op1);
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ConstantInt* CI2 = dyn_cast<ConstantInt>(V_op2);
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switch (Pred) {
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case CmpInst::ICMP_SGT: // signed greater than
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createConstraintSigSig(SIG_op2_t, SIG_op1_t, MinusOne);
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createConstraintSigSig(SIG_op1_f, SIG_op2_f, Zero);
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createConstraintSigSig(SIG_op2_t, SIG_op1_t, CI2, CI1, MinusOne);
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createConstraintSigSig(SIG_op1_f, SIG_op2_f, CI1, CI2, Zero);
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break;
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case CmpInst::ICMP_SGE: // signed greater or equal
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createConstraintSigSig(SIG_op2_t, SIG_op1_t, Zero);
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createConstraintSigSig(SIG_op1_f, SIG_op2_f, MinusOne);
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createConstraintSigSig(SIG_op2_t, SIG_op1_t, CI2, CI1, Zero);
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createConstraintSigSig(SIG_op1_f, SIG_op2_f, CI1, CI2, MinusOne);
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break;
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case CmpInst::ICMP_SLT: // signed less than
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createConstraintSigSig(SIG_op1_t, SIG_op2_t, MinusOne);
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createConstraintSigSig(SIG_op2_f, SIG_op1_f, Zero);
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createConstraintSigSig(SIG_op1_t, SIG_op2_t, CI1, CI2, MinusOne);
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createConstraintSigSig(SIG_op2_f, SIG_op1_f, CI2, CI1, Zero);
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break;
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case CmpInst::ICMP_SLE: // signed less or equal
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createConstraintSigSig(SIG_op1_t, SIG_op2_t, Zero);
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createConstraintSigSig(SIG_op2_f, SIG_op1_f, MinusOne);
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createConstraintSigSig(SIG_op1_t, SIG_op2_t, CI1, CI2, Zero);
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createConstraintSigSig(SIG_op2_f, SIG_op1_f, CI2, CI1, MinusOne);
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break;
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default:
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@ -772,6 +776,10 @@ void ABCD::createConstraintCmpInst(ICmpInst *ICI, TerminatorInst *TI) {
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/// b->a and c->a with weight 0 in the lower bound graph, and the edges
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/// a->b and a->c with weight 0 in the upper bound graph.
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void ABCD::createConstraintPHINode(PHINode *PN) {
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// FIXME: We really want to disallow sigma nodes, but I don't know the best
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// way to detect the other than this.
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if (PN->getNumOperands() == 2) return;
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int32_t width = cast<IntegerType>(PN->getType())->getBitWidth();
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for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
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Value *V = PN->getIncomingValue(i);
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@ -796,15 +804,15 @@ void ABCD::createConstraintSigInst(Instruction *I_op, BasicBlock *BB_succ_t,
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int32_t width = cast<IntegerType>((*SIG_op_t)->getType())->getBitWidth();
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inequality_graph.addEdge(I_op, *SIG_op_t, APInt(width, 0), true);
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inequality_graph.addEdge(*SIG_op_t, I_op, APInt(width, 0), false);
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if (created.insert(*SIG_op_t))
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createConstraintPHINode(cast<PHINode>(*SIG_op_t));
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//if (created.insert(*SIG_op_t))
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// createConstraintPHINode(cast<PHINode>(*SIG_op_t));
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}
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if (*SIG_op_f) {
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int32_t width = cast<IntegerType>((*SIG_op_f)->getType())->getBitWidth();
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inequality_graph.addEdge(I_op, *SIG_op_f, APInt(width, 0), true);
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inequality_graph.addEdge(*SIG_op_f, I_op, APInt(width, 0), false);
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if (created.insert(*SIG_op_f))
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createConstraintPHINode(cast<PHINode>(*SIG_op_f));
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//if (created.insert(*SIG_op_f))
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// createConstraintPHINode(cast<PHINode>(*SIG_op_f));
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}
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}
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@ -812,10 +820,17 @@ void ABCD::createConstraintSigInst(Instruction *I_op, BasicBlock *BB_succ_t,
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/// PN_op2 -> PN_op1 with value. In case any of them is NULL, replace
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/// with the respective V_op#, if V_op# is a ConstantInt.
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void ABCD::createConstraintSigSig(PHINode *SIG_op1, PHINode *SIG_op2,
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ConstantInt* V_op1, ConstantInt* V_op2,
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APInt value) {
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if (SIG_op1 && SIG_op2) {
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inequality_graph.addEdge(SIG_op2, SIG_op1, value, true);
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inequality_graph.addEdge(SIG_op1, SIG_op2, -value, false);
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} else if (SIG_op1 && V_op2) {
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inequality_graph.addEdge(V_op2, SIG_op1, value, true);
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inequality_graph.addEdge(SIG_op1, V_op2, -value, false);
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} else if (SIG_op2 && V_op1) {
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inequality_graph.addEdge(SIG_op2, V_op1, value, true);
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inequality_graph.addEdge(V_op1, SIG_op2, -value, false);
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}
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}
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27
test/Transforms/ABCD/basic.ll
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27
test/Transforms/ABCD/basic.ll
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@ -0,0 +1,27 @@
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; RUN: opt < %s -abcd -S | FileCheck %s
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define void @test() {
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; CHECK: @test
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; CHECK-NOT: br i1 %tmp95
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; CHECK: ret void
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entry:
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br label %bb19
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bb:
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br label %bb1
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bb1:
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%tmp7 = icmp sgt i32 %tmp94, 1
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br i1 %tmp7, label %bb.i.i, label %return
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bb.i.i:
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br label %return
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bb19:
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%tmp94 = ashr i32 undef, 3
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%tmp95 = icmp sgt i32 %tmp94, 16
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br i1 %tmp95, label %bb, label %return
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return:
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ret void
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}
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3
test/Transforms/ABCD/dg.exp
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3
test/Transforms/ABCD/dg.exp
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@ -0,0 +1,3 @@
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load_lib llvm.exp
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RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
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