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1. This changes handles the cases of (~x)&y and x&(~y) yielding ANDC, and

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(~x)|y and x|(~y) yielding ORC.

llvm-svn: 22771
This commit is contained in:
Jim Laskey 2005-08-12 23:38:02 +00:00
parent bdc747bc46
commit 7b32c9131d
1 changed files with 24 additions and 3 deletions
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27
lib/Target/PowerPC/PPC32ISelPattern.cpp
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@ -1717,10 +1717,17 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
return Result; return Result;
} }
} }
if (isOprNot(N.getOperand(1))) {
Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = SelectExpr(N.getOperand(1).getOperand(0));
BuildMI(BB, PPC::ANDC, 2, Result).addReg(Tmp1).addReg(Tmp2);
RecordSuccess = false;
return Result;
}
if (isOprNot(N.getOperand(0))) { if (isOprNot(N.getOperand(0))) {
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); Tmp1 = SelectExpr(N.getOperand(1));
Tmp2 = SelectExpr(N.getOperand(1)); Tmp2 = SelectExpr(N.getOperand(0).getOperand(0));
BuildMI(BB, PPC::ANDC, 2, Result).addReg(Tmp2).addReg(Tmp1); BuildMI(BB, PPC::ANDC, 2, Result).addReg(Tmp1).addReg(Tmp2);
RecordSuccess = false; RecordSuccess = false;
return Result; return Result;
} }
@ -1737,6 +1744,20 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
return Result; return Result;
if (SelectIntImmediateExpr(N, Result, PPC::ORIS, PPC::ORI)) if (SelectIntImmediateExpr(N, Result, PPC::ORIS, PPC::ORI))
return Result; return Result;
if (isOprNot(N.getOperand(1))) {
Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = SelectExpr(N.getOperand(1).getOperand(0));
BuildMI(BB, PPC::ORC, 2, Result).addReg(Tmp1).addReg(Tmp2);
RecordSuccess = false;
return Result;
}
if (isOprNot(N.getOperand(0))) {
Tmp1 = SelectExpr(N.getOperand(1));
Tmp2 = SelectExpr(N.getOperand(0).getOperand(0));
BuildMI(BB, PPC::ORC, 2, Result).addReg(Tmp1).addReg(Tmp2);
RecordSuccess = false;
return Result;
}
// emit regular or // emit regular or
Tmp1 = SelectExpr(N.getOperand(0)); Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = SelectExpr(N.getOperand(1)); Tmp2 = SelectExpr(N.getOperand(1));