RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Code Issues Projects Releases Wiki Activity

Strength reduce SAR into SHR if there is no way sign bits could be shifted

Browse Source 
in.  This tends to get cases like this:

  X = cast ubyte to int
  Y = shr int X, ...

Tested by: shift.ll:test24

llvm-svn: 21775
This commit is contained in:
Chris Lattner 2005-05-08 17:34:56 +00:00
parent 5fe4e982b8
commit 7b41539f32
1 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/Transforms/Scalar/InstructionCombining.cpp
View File

@ -3136,6 +3136,16 @@ Instruction *InstCombiner::visitShiftInst(ShiftInst &I) {
if (Instruction *R = FoldOpIntoSelect(I, SI, this))
return R;
// See if we can turn a signed shr into an unsigned shr.
if (!isLeftShift && I.getType()->isSigned()) {
if (MaskedValueIsZero(Op0, ConstantInt::getMinValue(I.getType()))) {
Value *V = InsertCastBefore(Op0, I.getType()->getUnsignedVersion(), I);
V = InsertNewInstBefore(new ShiftInst(Instruction::Shr, V, Op1,
I.getName()), I);
return new CastInst(V, I.getType());
}
}
if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(Op1)) {
// shl uint X, 32 = 0 and shr ubyte Y, 9 = 0, ... just don't eliminate shr
// of a signed value.