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[IPRA] Change algorithm for RegUsageInfoCollector.
The previous algorithm for RegUsageInfoCollector had pretty bad performance on architectures with a lot of registers that alias a lot one another, because we potentially iterate for every register over all the aliasing registers. This costs even more if the function is small and doesn't define a lot of registers. This patch changes the algorithm to one that while iterating over all the registers it will iterate over the aliasing registers only if the register itself is defined. This should be faster based on the assumption that only a subset of the whole LLVM registers set is actually defined in the function. Differential Revision: https://reviews.llvm.org/D30880 llvm-svn: 297673
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@ -103,9 +103,27 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "Clobbered Registers: ");
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for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
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if (MRI->isPhysRegModified(PReg, true))
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RegMask[PReg / 32] &= ~(1u << PReg % 32);
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const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask();
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auto SetRegAsDefined = [&RegMask] (unsigned Reg) {
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RegMask[Reg / 32] &= ~(1u << Reg % 32);
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};
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// Scan all the physical registers. When a register is defined in the current
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// function set it and all the aliasing registers as defined in the regmask.
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for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
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// If a register is in the UsedPhysRegsMask set then mark it as defined.
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// All it's aliases will also be in the set, so we can skip setting
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// as defined all the aliases here.
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if (UsedPhysRegsMask.test(PReg)) {
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SetRegAsDefined(PReg);
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continue;
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}
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// If a register is defined by an instruction mark it as defined together
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// with all it's aliases.
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if (!MRI->def_empty(PReg)) {
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for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
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SetRegAsDefined(*AI);
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}
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}
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if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {
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const uint32_t *CallPreservedMask =
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