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AMDGPU/SI: Refactor VOP[12C] tablegen definitions
Summary: Pass the VOPProfile object all the through to *_m multiclasses. This will allow us to do more simplifications in the future. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D13437 llvm-svn: 252339
This commit is contained in:
Tom Stellard
parent
dd38378605
commit
7b51915b47
@ -1351,20 +1351,22 @@ class VOP1_Real_vi <string opName, vop1 op, dag outs, dag ins, string asm> :
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let AssemblerPredicates = [isVI];
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}
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multiclass VOP1_m <vop1 op, dag outs, dag ins, string asm, list<dag> pattern,
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string opName> {
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def "" : VOP1_Pseudo <outs, ins, pattern, opName>;
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multiclass VOP1_m <vop1 op, string opName, VOPProfile p, list<dag> pattern,
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string asm = opName#p.Asm32> {
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def "" : VOP1_Pseudo <p.Outs, p.Ins32, pattern, opName>;
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def _si : VOP1_Real_si <opName, op, outs, ins, asm>;
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def _si : VOP1_Real_si <opName, op, p.Outs, p.Ins32, asm>;
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def _vi : VOP1_Real_vi <opName, op, p.Outs, p.Ins32, asm>;
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def _vi : VOP1_Real_vi <opName, op, outs, ins, asm>;
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}
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multiclass VOP1SI_m <vop1 op, dag outs, dag ins, string asm, list<dag> pattern,
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string opName> {
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def "" : VOP1_Pseudo <outs, ins, pattern, opName>;
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multiclass VOP1SI_m <vop1 op, string opName, VOPProfile p, list<dag> pattern,
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string asm = opName#p.Asm32> {
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def _si : VOP1_Real_si <opName, op, outs, ins, asm>;
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def "" : VOP1_Pseudo <p.Outs, p.Ins32, pattern, opName>;
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def _si : VOP1_Real_si <opName, op, p.Outs, p.Ins32, asm>;
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}
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class VOP2_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :
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@ -1388,22 +1390,24 @@ class VOP2_Real_vi <string opName, vop2 op, dag outs, dag ins, string asm> :
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let AssemblerPredicates = [isVI];
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}
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multiclass VOP2SI_m <vop2 op, dag outs, dag ins, string asm, list<dag> pattern,
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string opName, string revOp> {
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def "" : VOP2_Pseudo <outs, ins, pattern, opName>,
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multiclass VOP2SI_m <vop2 op, string opName, VOPProfile p, list<dag> pattern,
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string revOp> {
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def "" : VOP2_Pseudo <p.Outs32, p.Ins32, pattern, opName>,
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VOP2_REV<revOp#"_e32", !eq(revOp, opName)>;
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def _si : VOP2_Real_si <opName, op, outs, ins, asm>;
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def _si : VOP2_Real_si <opName, op, p.Outs32, p.Ins32, p.Asm32>;
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}
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multiclass VOP2_m <vop2 op, dag outs, dag ins, string asm, list<dag> pattern,
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string opName, string revOp> {
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def "" : VOP2_Pseudo <outs, ins, pattern, opName>,
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multiclass VOP2_m <vop2 op, string opName, VOPProfile p, list <dag> pattern,
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string revOp> {
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def "" : VOP2_Pseudo <p.Outs32, p.Ins32, pattern, opName>,
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VOP2_REV<revOp#"_e32", !eq(revOp, opName)>;
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def _si : VOP2_Real_si <opName, op, outs, ins, asm>;
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def _si : VOP2_Real_si <opName, op, p.Outs32, p.Ins32, p.Asm32>;
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def _vi : VOP2_Real_vi <opName, op, outs, ins, asm>;
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def _vi : VOP2_Real_vi <opName, op, p.Outs32, p.Ins32, p.Asm32>;
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}
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@ -1592,32 +1596,28 @@ multiclass VOP2SI_3VI_m <vop3 op, string opName, dag outs, dag ins,
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}
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}
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multiclass VOP1_Helper <vop1 op, string opName, dag outs,
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dag ins32, string asm32, list<dag> pat32,
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dag ins64, string asm64, list<dag> pat64,
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bit HasMods> {
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multiclass VOP1_Helper <vop1 op, string opName, VOPProfile p, list<dag> pat32,
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list<dag> pat64> {
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defm _e32 : VOP1_m <op, outs, ins32, opName#asm32, pat32, opName>;
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defm _e32 : VOP1_m <op, opName, p, pat32>;
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defm _e64 : VOP3_1_m <op, outs, ins64, opName#asm64, pat64, opName, HasMods>;
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defm _e64 : VOP3_1_m <op, p.Outs, p.Ins64, opName#p.Asm64, pat64, opName,
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p.HasModifiers>;
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}
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multiclass VOP1Inst <vop1 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag> : VOP1_Helper <
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op, opName, P.Outs,
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P.Ins32, P.Asm32, [],
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P.Ins64, P.Asm64,
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op, opName, P, [],
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!if(P.HasModifiers,
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[(set P.DstVT:$dst, (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0,
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i32:$src0_modifiers, i1:$clamp, i32:$omod))))],
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[(set P.DstVT:$dst, (node P.Src0VT:$src0))]),
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P.HasModifiers
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[(set P.DstVT:$dst, (node P.Src0VT:$src0))])
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>;
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multiclass VOP1InstSI <vop1 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag> {
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defm _e32 : VOP1SI_m <op, P.Outs, P.Ins32, opName#P.Asm32, [], opName>;
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defm _e32 : VOP1SI_m <op, opName, P, []>;
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defm _e64 : VOP3SI_1_m <op, P.Outs, P.Ins64, opName#P.Asm64,
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!if(P.HasModifiers,
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@ -1627,36 +1627,33 @@ multiclass VOP1InstSI <vop1 op, string opName, VOPProfile P,
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opName, P.HasModifiers>;
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}
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multiclass VOP2_Helper <vop2 op, string opName, dag outs,
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dag ins32, string asm32, list<dag> pat32,
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dag ins64, string asm64, list<dag> pat64,
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string revOp, bit HasMods> {
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defm _e32 : VOP2_m <op, outs, ins32, asm32, pat32, opName, revOp>;
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multiclass VOP2_Helper <vop2 op, string opName, VOPProfile p, list<dag> pat32,
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list<dag> pat64, string revOp> {
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defm _e64 : VOP3_2_m <op,
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outs, ins64, opName#asm64, pat64, opName, revOp, HasMods
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>;
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defm _e32 : VOP2_m <op, opName, p, pat32, revOp>;
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defm _e64 : VOP3_2_m <op, p.Outs, p.Ins64, opName#p.Asm64, pat64, opName,
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revOp, p.HasModifiers>;
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}
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multiclass VOP2Inst <vop2 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag,
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string revOp = opName> : VOP2_Helper <
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op, opName, P.Outs,
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P.Ins32, P.Asm32, [],
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P.Ins64, P.Asm64,
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op, opName, P, [],
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!if(P.HasModifiers,
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[(set P.DstVT:$dst,
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(node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
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i1:$clamp, i32:$omod)),
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(P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers))))],
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[(set P.DstVT:$dst, (node P.Src0VT:$src0, P.Src1VT:$src1))]),
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revOp, P.HasModifiers
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revOp
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>;
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multiclass VOP2InstSI <vop2 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag,
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string revOp = opName> {
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defm _e32 : VOP2SI_m <op, P.Outs, P.Ins32, P.Asm32, [], opName, revOp>;
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defm _e32 : VOP2SI_m <op, opName, P, [], revOp>;
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defm _e64 : VOP3SI_2_m <op, P.Outs, P.Ins64, opName#P.Asm64,
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!if(P.HasModifiers,
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@ -1668,61 +1665,55 @@ multiclass VOP2InstSI <vop2 op, string opName, VOPProfile P,
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opName, revOp, P.HasModifiers>;
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}
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multiclass VOP2b_Helper <vop2 op, string opName, dag outs32, dag outs64,
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dag ins32, string asm32, list<dag> pat32,
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dag ins64, string asm64, list<dag> pat64,
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string revOp, bit HasMods, bit useSGPRInput> {
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multiclass VOP2b_Helper <vop2 op, string opName, VOPProfile p,
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list<dag> pat32, list<dag> pat64,
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string revOp, bit useSGPRInput> {
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let SchedRW = [Write32Bit, WriteSALU] in {
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let Uses = !if(useSGPRInput, [VCC, EXEC], [EXEC]), Defs = [VCC] in {
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defm _e32 : VOP2_m <op, outs32, ins32, asm32, pat32, opName, revOp>;
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defm _e32 : VOP2_m <op, opName, p, pat32, revOp>;
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}
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defm _e64 : VOP3b_2_3_m <op,
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outs64, ins64, opName#asm64, pat64, opName, revOp, HasMods, useSGPRInput
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>;
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defm _e64 : VOP3b_2_3_m <op, p.Outs64, p.Ins64, opName#p.Asm64, pat64,
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opName, revOp, p.HasModifiers, useSGPRInput>;
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}
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}
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multiclass VOP2bInst <vop2 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag,
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string revOp = opName> : VOP2b_Helper <
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op, opName, P.Outs32, P.Outs64,
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P.Ins32, P.Asm32, [],
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P.Ins64, P.Asm64,
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op, opName, P, [],
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!if(P.HasModifiers,
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[(set P.DstVT:$dst,
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(node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
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i1:$clamp, i32:$omod)),
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(P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers))))],
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[(set P.DstVT:$dst, (node P.Src0VT:$src0, P.Src1VT:$src1))]),
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revOp, P.HasModifiers, !eq(P.NumSrcArgs, 3)
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revOp, !eq(P.NumSrcArgs, 3)
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>;
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// A VOP2 instruction that is VOP3-only on VI.
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multiclass VOP2_VI3_Helper <vop23 op, string opName, dag outs,
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dag ins32, string asm32, list<dag> pat32,
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dag ins64, string asm64, list<dag> pat64,
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string revOp, bit HasMods> {
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defm _e32 : VOP2SI_m <op, outs, ins32, asm32, pat32, opName, revOp>;
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multiclass VOP2_VI3_Helper <vop23 op, string opName, VOPProfile p,
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list<dag> pat32, list<dag> pat64, string revOp> {
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defm _e64 : VOP3_2_m <op, outs, ins64, opName#asm64, pat64, opName,
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revOp, HasMods>;
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defm _e32 : VOP2SI_m <op, opName, p, pat32, revOp>;
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defm _e64 : VOP3_2_m <op, p.Outs, p.Ins64, opName#p.Asm64, pat64, opName,
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revOp, p.HasModifiers>;
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}
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multiclass VOP2_VI3_Inst <vop23 op, string opName, VOPProfile P,
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SDPatternOperator node = null_frag,
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string revOp = opName>
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: VOP2_VI3_Helper <
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op, opName, P.Outs,
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P.Ins32, P.Asm32, [],
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P.Ins64, P.Asm64,
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op, opName, P, [],
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!if(P.HasModifiers,
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[(set P.DstVT:$dst,
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(node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
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i1:$clamp, i32:$omod)),
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(P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers))))],
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[(set P.DstVT:$dst, (node P.Src0VT:$src0, P.Src1VT:$src1))]),
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revOp, P.HasModifiers
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revOp
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>;
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multiclass VOP2MADK <vop2 op, string opName, list<dag> pattern = []> {
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@ -1787,31 +1778,24 @@ multiclass VOPC_m <vopc op, dag ins, string op_asm, list<dag> pattern,
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defm : SIInstAliasBuilder<alias_asm, p>;
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}
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multiclass VOPC_Helper <vopc op, string opName,
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dag ins32, string asm32, list<dag> pat32,
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dag out64, dag ins64, string asm64, list<dag> pat64,
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bit HasMods, bit DefExec, string revOp,
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VOPProfile p,
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list<SchedReadWrite> sched> {
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defm _e32 : VOPC_m <op, ins32, asm32, pat32, opName, DefExec, p, sched>;
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multiclass VOPC_Helper <vopc op, string opName, list<dag> pat32,
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list<dag> pat64, bit DefExec, string revOp,
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VOPProfile p, list<SchedReadWrite> sched> {
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defm _e32 : VOPC_m <op, p.Ins32, p.Asm32, pat32, opName, DefExec, p, sched>;
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defm _e64 : VOP3_C_m <op, out64, ins64, opName#asm64, pat64,
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opName, HasMods, DefExec, revOp,
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sched>;
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defm _e64 : VOP3_C_m <op, (outs VOPDstS64:$dst), p.Ins64, opName#p.Asm64, pat64,
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opName, p.HasModifiers, DefExec, revOp, sched>;
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}
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// Special case for class instructions which only have modifiers on
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// the 1st source operand.
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multiclass VOPC_Class_Helper <vopc op, string opName,
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dag ins32, string asm32, list<dag> pat32,
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dag out64, dag ins64, string asm64, list<dag> pat64,
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bit HasMods, bit DefExec, string revOp,
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VOPProfile p,
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list<SchedReadWrite> sched> {
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defm _e32 : VOPC_m <op, ins32, asm32, pat32, opName, DefExec, p, sched>;
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multiclass VOPC_Class_Helper <vopc op, string opName, list<dag> pat32,
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list<dag> pat64, bit DefExec, string revOp,
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VOPProfile p, list<SchedReadWrite> sched> {
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defm _e32 : VOPC_m <op, p.Ins32, p.Asm32, pat32, opName, DefExec, p, sched>;
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defm _e64 : VOP3_C_m <op, out64, ins64, opName#asm64, pat64,
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opName, HasMods, DefExec, revOp, sched>,
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defm _e64 : VOP3_C_m <op, (outs VOPDstS64:$dst), p.Ins64, opName#p.Asm64, pat64,
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opName, p.HasModifiers, DefExec, revOp, sched>,
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VOP3DisableModFields<1, 0, 0>;
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}
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@ -1821,9 +1805,7 @@ multiclass VOPCInst <vopc op, string opName,
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bit DefExec = 0,
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list<SchedReadWrite> sched = [Write32Bit]> :
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VOPC_Helper <
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op, opName,
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P.Ins32, P.Asm32, [],
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(outs VOPDstS64:$dst), P.Ins64, P.Asm64,
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op, opName, [],
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!if(P.HasModifiers,
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[(set i1:$dst,
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(setcc (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
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@ -1831,20 +1813,18 @@ multiclass VOPCInst <vopc op, string opName,
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(P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
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cond))],
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[(set i1:$dst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]),
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P.HasModifiers, DefExec, revOp, P, sched
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DefExec, revOp, P, sched
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>;
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multiclass VOPCClassInst <vopc op, string opName, VOPProfile P,
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bit DefExec = 0,
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list<SchedReadWrite> sched> : VOPC_Class_Helper <
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op, opName,
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P.Ins32, P.Asm32, [],
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(outs VOPDstS64:$dst), P.Ins64, P.Asm64,
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op, opName, [],
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!if(P.HasModifiers,
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[(set i1:$dst,
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(AMDGPUfp_class (P.Src0VT (VOP3Mods0Clamp0OMod P.Src0VT:$src0, i32:$src0_modifiers)), P.Src1VT:$src1))],
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[(set i1:$dst, (AMDGPUfp_class P.Src0VT:$src0, P.Src1VT:$src1))]),
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P.HasModifiers, DefExec, opName, P, sched
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DefExec, opName, P, sched
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>;
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@ -1431,9 +1431,7 @@ defm V_INTERP_MOV_F32 : VINTRP_m <
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//===----------------------------------------------------------------------===//
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multiclass V_CNDMASK <vop2 op, string name> {
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defm _e32 : VOP2_m <
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op, VOP_CNDMASK.Outs, VOP_CNDMASK.Ins32, VOP_CNDMASK.Asm32, [],
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name, name>;
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defm _e32 : VOP2_m <op, name, VOP_CNDMASK, [], name>;
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defm _e64 : VOP3_m <
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op, VOP_CNDMASK.Outs, VOP_CNDMASK.Ins64,
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