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Add an MRI::tracksLiveness() flag.
Late optimization passes like branch folding and tail duplication can transform the machine code in a way that makes it expensive to keep the register liveness information up to date. There is a fuzzy line between register allocation and late scheduling where the liveness information degrades. The MRI::tracksLiveness() flag makes the line clear: While true, liveness information is accurate, and can be used for register scavenging. Once the flag is false, liveness information is not accurate, and can only be used as a hint. Late passes generally don't need the liveness information, but they will sometimes use the register scavenger to help update it. The scavenger enforces strict correctness, and we have to spend a lot of code to update register liveness that may never be used. llvm-svn: 153511
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@ -32,6 +32,11 @@ class MachineRegisterInfo {
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/// registers have a single def.
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bool IsSSA;
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/// TracksLiveness - True while register liveness is being tracked accurately.
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/// Basic block live-in lists, kill flags, and implicit defs may not be
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/// accurate when after this flag is cleared.
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bool TracksLiveness;
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/// VRegInfo - Information we keep for each virtual register.
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///
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/// Each element in this list contains the register class of the vreg and the
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@ -103,6 +108,23 @@ public:
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// leaveSSA - Indicates that the machine function is no longer in SSA form.
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void leaveSSA() { IsSSA = false; }
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/// tracksLiveness - Returns true when tracking register liveness accurately.
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///
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/// While this flag is true, register liveness information in basic block
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/// live-in lists and machine instruction operands is accurate. This means it
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/// can be used to change the code in ways that affect the values in
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/// registers, for example by the register scavenger.
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///
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/// When this flag is false, liveness is no longer reliable.
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bool tracksLiveness() const { return TracksLiveness; }
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/// invalidateLiveness - Indicates that register liveness is no longer being
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/// tracked accurately.
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///
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/// This should be called by late passes that invalidate the liveness
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/// information.
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void invalidateLiveness() { TracksLiveness = false; }
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//===--------------------------------------------------------------------===//
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// Register Info
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//===--------------------------------------------------------------------===//
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@ -18,7 +18,7 @@
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using namespace llvm;
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MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
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: TRI(&TRI), IsSSA(true) {
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: TRI(&TRI), IsSSA(true), TracksLiveness(true) {
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VRegInfo.reserve(256);
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RegAllocHints.reserve(256);
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UsedPhysRegs.resize(TRI.getNumRegs());
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@ -83,6 +83,11 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
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assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
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"Target changed?");
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// It is not possible to use the register scavenger after late optimization
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// passes that don't preserve accurate liveness information.
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assert(MRI->tracksLiveness() &&
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"Cannot use register scavenger with inaccurate liveness");
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// Self-initialize.
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if (!MBB) {
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NumPhysRegs = TRI->getNumRegs();
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