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Add an MRI::tracksLiveness() flag.

Late optimization passes like branch folding and tail duplication can
transform the machine code in a way that makes it expensive to keep the
register liveness information up to date. There is a fuzzy line between
register allocation and late scheduling where the liveness information
degrades.

The MRI::tracksLiveness() flag makes the line clear: While true,
liveness information is accurate, and can be used for register
scavenging. Once the flag is false, liveness information is not
accurate, and can only be used as a hint.

Late passes generally don't need the liveness information, but they will
sometimes use the register scavenger to help update it. The scavenger
enforces strict correctness, and we have to spend a lot of code to
update register liveness that may never be used.

llvm-svn: 153511
This commit is contained in:
Jakob Stoklund Olesen 2012-03-27 15:13:58 +00:00
parent eb0805cb93
commit 7ba0f121e5
3 changed files with 28 additions and 1 deletions

View File

@ -32,6 +32,11 @@ class MachineRegisterInfo {
/// registers have a single def.
bool IsSSA;
/// TracksLiveness - True while register liveness is being tracked accurately.
/// Basic block live-in lists, kill flags, and implicit defs may not be
/// accurate when after this flag is cleared.
bool TracksLiveness;
/// VRegInfo - Information we keep for each virtual register.
///
/// Each element in this list contains the register class of the vreg and the
@ -103,6 +108,23 @@ public:
// leaveSSA - Indicates that the machine function is no longer in SSA form.
void leaveSSA() { IsSSA = false; }
/// tracksLiveness - Returns true when tracking register liveness accurately.
///
/// While this flag is true, register liveness information in basic block
/// live-in lists and machine instruction operands is accurate. This means it
/// can be used to change the code in ways that affect the values in
/// registers, for example by the register scavenger.
///
/// When this flag is false, liveness is no longer reliable.
bool tracksLiveness() const { return TracksLiveness; }
/// invalidateLiveness - Indicates that register liveness is no longer being
/// tracked accurately.
///
/// This should be called by late passes that invalidate the liveness
/// information.
void invalidateLiveness() { TracksLiveness = false; }
//===--------------------------------------------------------------------===//
// Register Info
//===--------------------------------------------------------------------===//

View File

@ -18,7 +18,7 @@
using namespace llvm;
MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
: TRI(&TRI), IsSSA(true) {
: TRI(&TRI), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
UsedPhysRegs.resize(TRI.getNumRegs());

View File

@ -83,6 +83,11 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
"Target changed?");
// It is not possible to use the register scavenger after late optimization
// passes that don't preserve accurate liveness information.
assert(MRI->tracksLiveness() &&
"Cannot use register scavenger with inaccurate liveness");
// Self-initialize.
if (!MBB) {
NumPhysRegs = TRI->getNumRegs();