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https://github.com/RPCS3/llvm-mirror.git
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[SimplifyCFG] Consider cost of combining predicates.
Modify FoldBranchToCommonDest to consider the cost of inserting instructions when attempting to combine predicates to fold blocks. The threshold can be controlled via a new option: -simplifycfg-branch-fold-threshold which defaults to '2' to allow the insertion of a not and another logical operator. Differential Revision: https://reviews.llvm.org/D86526
This commit is contained in:
Sam Parker
parent
a04922a28f
commit
7c4a7cb063
@ -199,6 +199,7 @@ bool FlattenCFG(BasicBlock *BB, AAResults *AA = nullptr);
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/// branches to us and one of our successors, fold the setcc into the
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/// predecessor and use logical operations to pick the right destination.
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bool FoldBranchToCommonDest(BranchInst *BI, MemorySSAUpdater *MSSAU = nullptr,
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const TargetTransformInfo *TTI = nullptr,
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unsigned BonusInstThreshold = 1);
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/// This function takes a virtual register computed by an Instruction and
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@ -143,6 +143,13 @@ MaxSmallBlockSize("simplifycfg-max-small-block-size", cl::Hidden, cl::init(10),
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cl::desc("Max size of a block which is still considered "
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"small enough to thread through"));
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// Two is chosen to allow one negation and a logical combine.
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static cl::opt<unsigned>
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BranchFoldThreshold("simplifycfg-branch-fold-threshold", cl::Hidden,
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cl::init(2),
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cl::desc("Maximum cost of combining conditions when "
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"folding branches"));
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STATISTIC(NumBitMaps, "Number of switch instructions turned into bitmaps");
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STATISTIC(NumLinearMaps,
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"Number of switch instructions turned into linear mapping");
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@ -2684,12 +2691,16 @@ static bool extractPredSuccWeights(BranchInst *PBI, BranchInst *BI,
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/// and one of our successors, fold the block into the predecessor and use
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/// logical operations to pick the right destination.
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bool llvm::FoldBranchToCommonDest(BranchInst *BI, MemorySSAUpdater *MSSAU,
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const TargetTransformInfo *TTI,
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unsigned BonusInstThreshold) {
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BasicBlock *BB = BI->getParent();
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const unsigned PredCount = pred_size(BB);
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bool Changed = false;
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TargetTransformInfo::TargetCostKind CostKind =
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BB->getParent()->hasMinSize() ? TargetTransformInfo::TCK_CodeSize
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: TargetTransformInfo::TCK_SizeAndLatency;
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Instruction *Cond = nullptr;
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if (BI->isConditional())
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@ -2818,6 +2829,19 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, MemorySSAUpdater *MSSAU,
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continue;
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}
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// Check the cost of inserting the necessary logic before performing the
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// transformation.
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if (TTI && Opc != Instruction::BinaryOpsEnd) {
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Type *Ty = BI->getCondition()->getType();
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unsigned Cost = TTI->getArithmeticInstrCost(Opc, Ty, CostKind);
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if (InvertPredCond && (!PBI->getCondition()->hasOneUse() ||
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!isa<CmpInst>(PBI->getCondition())))
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Cost += TTI->getArithmeticInstrCost(Instruction::Xor, Ty, CostKind);
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if (Cost > BranchFoldThreshold)
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continue;
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}
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LLVM_DEBUG(dbgs() << "FOLDING BRANCH TO COMMON DEST:\n" << *PBI << *BB);
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Changed = true;
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@ -6013,7 +6037,7 @@ bool SimplifyCFGOpt::simplifyUncondBranch(BranchInst *BI,
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// branches to us and our successor, fold the comparison into the
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// predecessor and use logical operations to update the incoming value
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// for PHI nodes in common successor.
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if (FoldBranchToCommonDest(BI, nullptr, Options.BonusInstThreshold))
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if (FoldBranchToCommonDest(BI, nullptr, &TTI, Options.BonusInstThreshold))
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return requestResimplify();
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return false;
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}
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@ -6076,7 +6100,7 @@ bool SimplifyCFGOpt::simplifyCondBranch(BranchInst *BI, IRBuilder<> &Builder) {
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// If this basic block is ONLY a compare and a branch, and if a predecessor
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// branches to us and one of our successors, fold the comparison into the
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// predecessor and use logical operations to pick the right destination.
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if (FoldBranchToCommonDest(BI, nullptr, Options.BonusInstThreshold))
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if (FoldBranchToCommonDest(BI, nullptr, &TTI, Options.BonusInstThreshold))
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return requestResimplify();
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// We have a conditional branch to two blocks that are only reachable
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@ -169,19 +169,34 @@ cond.end:
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}
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define i32 @or_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) #0 {
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; CHECK-LABEL: @or_predicate_minsize(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; CHECK: cond.false:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; CHECK-NEXT: br label [[COND_END]]
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; CHECK: cond.end:
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; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[COND]]
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; THUMB-LABEL: @or_predicate_minsize(
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; THUMB-NEXT: entry:
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; THUMB-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
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; THUMB-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[LOR_LHS_FALSE:%.*]]
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; THUMB: lor.lhs.false:
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; THUMB-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
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; THUMB: cond.false:
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; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; THUMB-NEXT: br label [[COND_END]]
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; THUMB: cond.end:
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; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; THUMB-NEXT: ret i32 [[COND]]
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;
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; ARM-LABEL: @or_predicate_minsize(
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; ARM-NEXT: entry:
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; ARM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
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; ARM-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; ARM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; ARM-NEXT: [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
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; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; ARM: cond.false:
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; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; ARM-NEXT: br label [[COND_END]]
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; ARM: cond.end:
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; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; ARM-NEXT: ret i32 [[COND]]
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;
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entry:
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%cmp = icmp sgt i32 %d, 3
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@ -202,19 +217,34 @@ cond.end:
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}
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define i32 @or_invert_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) #0 {
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; CHECK-LABEL: @or_invert_predicate_minsize(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[D:%.*]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; CHECK: cond.false:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; CHECK-NEXT: br label [[COND_END]]
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; CHECK: cond.end:
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; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[COND]]
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; THUMB-LABEL: @or_invert_predicate_minsize(
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; THUMB-NEXT: entry:
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; THUMB-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
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; THUMB-NEXT: br i1 [[CMP]], label [[LOR_LHS_FALSE:%.*]], label [[COND_END:%.*]]
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; THUMB: lor.lhs.false:
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; THUMB-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
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; THUMB: cond.false:
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; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; THUMB-NEXT: br label [[COND_END]]
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; THUMB: cond.end:
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; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; THUMB-NEXT: ret i32 [[COND]]
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;
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; ARM-LABEL: @or_invert_predicate_minsize(
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; ARM-NEXT: entry:
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; ARM-NEXT: [[CMP:%.*]] = icmp sle i32 [[D:%.*]], 3
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; ARM-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; ARM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; ARM-NEXT: [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
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; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; ARM: cond.false:
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; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; ARM-NEXT: br label [[COND_END]]
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; ARM: cond.end:
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; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; ARM-NEXT: ret i32 [[COND]]
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;
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entry:
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%cmp = icmp sgt i32 %d, 3
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@ -267,19 +297,33 @@ cond.end:
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}
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define i32 @or_xor_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) #0 {
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; CHECK-LABEL: @or_xor_predicate_minsize(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP1]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; CHECK: cond.false:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; CHECK-NEXT: br label [[COND_END]]
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; CHECK: cond.end:
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; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[COND]]
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; THUMB-LABEL: @or_xor_predicate_minsize(
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; THUMB-NEXT: entry:
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; THUMB-NEXT: br i1 [[CMP:%.*]], label [[LOR_LHS_FALSE:%.*]], label [[COND_END:%.*]]
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; THUMB: lor.lhs.false:
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; THUMB-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
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; THUMB: cond.false:
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; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; THUMB-NEXT: br label [[COND_END]]
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; THUMB: cond.end:
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; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; THUMB-NEXT: ret i32 [[COND]]
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;
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; ARM-LABEL: @or_xor_predicate_minsize(
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; ARM-NEXT: entry:
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; ARM-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
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; ARM-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; ARM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; ARM-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP1]]
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; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; ARM: cond.false:
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; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; ARM-NEXT: br label [[COND_END]]
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; ARM: cond.end:
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; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; ARM-NEXT: ret i32 [[COND]]
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;
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entry:
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br i1 %cmp, label %lor.lhs.false, label %cond.end
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@ -331,19 +375,33 @@ cond.end:
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}
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define i32 @and_xor_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) #0 {
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; CHECK-LABEL: @and_xor_minsize(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP_NOT]], [[CMP1]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
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; CHECK: cond.false:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; CHECK-NEXT: br label [[COND_END]]
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; CHECK: cond.end:
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; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[COND]]
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; THUMB-LABEL: @and_xor_minsize(
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; THUMB-NEXT: entry:
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; THUMB-NEXT: br i1 [[CMP:%.*]], label [[COND_END:%.*]], label [[LOR_LHS_FALSE:%.*]]
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; THUMB: lor.lhs.false:
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; THUMB-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; THUMB-NEXT: br i1 [[CMP1]], label [[COND_FALSE:%.*]], label [[COND_END]]
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; THUMB: cond.false:
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; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; THUMB-NEXT: br label [[COND_END]]
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; THUMB: cond.end:
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; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; THUMB-NEXT: ret i32 [[COND]]
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;
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; ARM-LABEL: @and_xor_minsize(
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; ARM-NEXT: entry:
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; ARM-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
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; ARM-NEXT: [[ADD:%.*]] = add nsw i32 [[C:%.*]], [[A:%.*]]
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; ARM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
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; ARM-NEXT: [[OR_COND:%.*]] = and i1 [[CMP_NOT]], [[CMP1]]
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; ARM-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
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; ARM: cond.false:
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; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
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; ARM-NEXT: br label [[COND_END]]
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; ARM: cond.end:
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; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
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; ARM-NEXT: ret i32 [[COND]]
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;
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entry:
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br i1 %cmp, label %cond.end, label %lor.lhs.false
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