mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 19:52:54 +01:00
Default ISD::PREFETCH to expand.
llvm-svn: 48169
This commit is contained in:
parent
067ecbc341
commit
7d9e5a7680
@ -178,6 +178,9 @@ TargetLowering::TargetLowering(TargetMachine &tm)
|
|||||||
// These operations default to expand.
|
// These operations default to expand.
|
||||||
setOperationAction(ISD::FGETSIGN, (MVT::ValueType)VT, Expand);
|
setOperationAction(ISD::FGETSIGN, (MVT::ValueType)VT, Expand);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// Most targets ignore the @llvm.prefetch intrinsic.
|
||||||
|
setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
|
||||||
|
|
||||||
// ConstantFP nodes default to expand. Targets can either change this to
|
// ConstantFP nodes default to expand. Targets can either change this to
|
||||||
// Legal, in which case all fp constants are legal, or use addLegalFPImmediate
|
// Legal, in which case all fp constants are legal, or use addLegalFPImmediate
|
||||||
|
@ -211,7 +211,6 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
|
|||||||
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand);
|
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand);
|
||||||
setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand);
|
setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand);
|
||||||
setOperationAction(ISD::PREFETCH , MVT::Other, Expand);
|
|
||||||
|
|
||||||
if (!Subtarget->hasV6Ops()) {
|
if (!Subtarget->hasV6Ops()) {
|
||||||
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
|
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
|
||||||
|
@ -116,7 +116,6 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
|
|||||||
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
|
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
|
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
|
||||||
setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
|
|
||||||
|
|
||||||
// We want to legalize GlobalAddress and ConstantPool and
|
// We want to legalize GlobalAddress and ConstantPool and
|
||||||
// ExternalSymbols nodes into the appropriate instructions to
|
// ExternalSymbols nodes into the appropriate instructions to
|
||||||
|
@ -321,7 +321,6 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
|
|||||||
setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
|
setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
|
||||||
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand);
|
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand);
|
||||||
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64 , Expand);
|
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64 , Expand);
|
||||||
setOperationAction(ISD::PREFETCH , MVT::Other, Expand);
|
|
||||||
|
|
||||||
// Cell SPU has instructions for converting between i64 and fp.
|
// Cell SPU has instructions for converting between i64 and fp.
|
||||||
setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
|
setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
|
||||||
|
@ -109,7 +109,6 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
|
|||||||
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
|
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
|
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
|
||||||
setOperationAction(ISD::PREFETCH , MVT::Other, Expand);
|
|
||||||
|
|
||||||
// Thread Local Storage
|
// Thread Local Storage
|
||||||
setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
|
setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
|
||||||
|
@ -84,7 +84,6 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
|
|||||||
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
|
|
||||||
|
|
||||||
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
|
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
|
||||||
setOperationAction(ISD::CTTZ , MVT::i32, Expand);
|
setOperationAction(ISD::CTTZ , MVT::i32, Expand);
|
||||||
|
@ -82,7 +82,6 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
|
|||||||
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
|
|
||||||
|
|
||||||
// PowerPC has no SREM/UREM instructions
|
// PowerPC has no SREM/UREM instructions
|
||||||
setOperationAction(ISD::SREM, MVT::i32, Expand);
|
setOperationAction(ISD::SREM, MVT::i32, Expand);
|
||||||
|
@ -197,7 +197,6 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
|
|||||||
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
|
||||||
setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
|
|
||||||
|
|
||||||
setOperationAction(ISD::FSIN , MVT::f64, Expand);
|
setOperationAction(ISD::FSIN , MVT::f64, Expand);
|
||||||
setOperationAction(ISD::FCOS , MVT::f64, Expand);
|
setOperationAction(ISD::FCOS , MVT::f64, Expand);
|
||||||
|
@ -286,8 +286,8 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
|
|||||||
setOperationAction(ISD::MEMSET , MVT::Other, Custom);
|
setOperationAction(ISD::MEMSET , MVT::Other, Custom);
|
||||||
setOperationAction(ISD::MEMCPY , MVT::Other, Custom);
|
setOperationAction(ISD::MEMCPY , MVT::Other, Custom);
|
||||||
|
|
||||||
if (!Subtarget->hasSSE1())
|
if (Subtarget->hasSSE1())
|
||||||
setOperationAction(ISD::PREFETCH , MVT::Other, Expand);
|
setOperationAction(ISD::PREFETCH , MVT::Other, Legal);
|
||||||
|
|
||||||
if (!Subtarget->hasSSE2())
|
if (!Subtarget->hasSSE2())
|
||||||
setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand);
|
setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand);
|
||||||
|
Loading…
Reference in New Issue
Block a user