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Add support for AVX-512 CodeView registers.
When compiling with /arch:AVX512 and optimizations turned on, we could crash while emitting debug info because we did not have CodeView register constants for the AVX 512 register set defined. This patch defines them. Differential Revision: https://reviews.llvm.org/D50819 llvm-svn: 339893
This commit is contained in:
Zachary Turner
parent
98b577be85
commit
7dc595f4c3
@ -266,3 +266,62 @@ CV_REGISTER(CVRegAMD64_YMM12, 380)
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CV_REGISTER(CVRegAMD64_YMM13, 381)
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CV_REGISTER(CVRegAMD64_YMM13, 381)
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CV_REGISTER(CVRegAMD64_YMM14, 382)
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CV_REGISTER(CVRegAMD64_YMM14, 382)
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CV_REGISTER(CVRegAMD64_YMM15, 383)
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CV_REGISTER(CVRegAMD64_YMM15, 383)
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CV_REGISTER(CVRegAMD64_YMM16, 710)
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CV_REGISTER(CVRegAMD64_YMM17, 711)
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CV_REGISTER(CVRegAMD64_YMM18, 712)
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CV_REGISTER(CVRegAMD64_YMM19, 713)
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CV_REGISTER(CVRegAMD64_YMM20, 714)
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CV_REGISTER(CVRegAMD64_YMM21, 715)
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CV_REGISTER(CVRegAMD64_YMM22, 716)
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CV_REGISTER(CVRegAMD64_YMM23, 717)
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CV_REGISTER(CVRegAMD64_YMM24, 718)
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CV_REGISTER(CVRegAMD64_YMM25, 719)
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CV_REGISTER(CVRegAMD64_YMM26, 720)
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CV_REGISTER(CVRegAMD64_YMM27, 721)
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CV_REGISTER(CVRegAMD64_YMM28, 722)
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CV_REGISTER(CVRegAMD64_YMM29, 723)
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CV_REGISTER(CVRegAMD64_YMM30, 724)
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CV_REGISTER(CVRegAMD64_YMM31, 725)
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CV_REGISTER(CVRegAMD64_ZMM0, 726)
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CV_REGISTER(CVRegAMD64_ZMM1, 727)
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CV_REGISTER(CVRegAMD64_ZMM2, 728)
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CV_REGISTER(CVRegAMD64_ZMM3, 729)
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CV_REGISTER(CVRegAMD64_ZMM4, 730)
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CV_REGISTER(CVRegAMD64_ZMM5, 731)
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CV_REGISTER(CVRegAMD64_ZMM6, 732)
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CV_REGISTER(CVRegAMD64_ZMM7, 733)
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CV_REGISTER(CVRegAMD64_ZMM8, 734)
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CV_REGISTER(CVRegAMD64_ZMM9, 735)
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CV_REGISTER(CVRegAMD64_ZMM10, 736)
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CV_REGISTER(CVRegAMD64_ZMM11, 737)
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CV_REGISTER(CVRegAMD64_ZMM12, 738)
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CV_REGISTER(CVRegAMD64_ZMM13, 739)
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CV_REGISTER(CVRegAMD64_ZMM14, 740)
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CV_REGISTER(CVRegAMD64_ZMM15, 741)
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CV_REGISTER(CVRegAMD64_ZMM16, 742)
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CV_REGISTER(CVRegAMD64_ZMM17, 743)
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CV_REGISTER(CVRegAMD64_ZMM18, 744)
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CV_REGISTER(CVRegAMD64_ZMM19, 745)
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CV_REGISTER(CVRegAMD64_ZMM20, 746)
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CV_REGISTER(CVRegAMD64_ZMM21, 747)
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CV_REGISTER(CVRegAMD64_ZMM22, 748)
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CV_REGISTER(CVRegAMD64_ZMM23, 749)
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CV_REGISTER(CVRegAMD64_ZMM24, 750)
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CV_REGISTER(CVRegAMD64_ZMM25, 751)
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CV_REGISTER(CVRegAMD64_ZMM26, 752)
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CV_REGISTER(CVRegAMD64_ZMM27, 753)
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CV_REGISTER(CVRegAMD64_ZMM28, 754)
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CV_REGISTER(CVRegAMD64_ZMM29, 755)
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CV_REGISTER(CVRegAMD64_ZMM30, 756)
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CV_REGISTER(CVRegAMD64_ZMM31, 757)
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CV_REGISTER(CVRegAMD64_K0, 758)
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CV_REGISTER(CVRegAMD64_K1, 759)
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CV_REGISTER(CVRegAMD64_K2, 760)
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CV_REGISTER(CVRegAMD64_K3, 761)
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CV_REGISTER(CVRegAMD64_K4, 762)
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CV_REGISTER(CVRegAMD64_K5, 763)
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CV_REGISTER(CVRegAMD64_K6, 764)
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CV_REGISTER(CVRegAMD64_K7, 765)
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@ -81,120 +81,176 @@ void X86_MC::initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI) {
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codeview::RegisterId CVReg;
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codeview::RegisterId CVReg;
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MCPhysReg Reg;
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MCPhysReg Reg;
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} RegMap[] = {
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} RegMap[] = {
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{ codeview::RegisterId::CVRegAL, X86::AL},
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{codeview::RegisterId::CVRegAL, X86::AL},
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{ codeview::RegisterId::CVRegCL, X86::CL},
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{codeview::RegisterId::CVRegCL, X86::CL},
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{ codeview::RegisterId::CVRegDL, X86::DL},
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{codeview::RegisterId::CVRegDL, X86::DL},
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{ codeview::RegisterId::CVRegBL, X86::BL},
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{codeview::RegisterId::CVRegBL, X86::BL},
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{ codeview::RegisterId::CVRegAH, X86::AH},
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{codeview::RegisterId::CVRegAH, X86::AH},
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{ codeview::RegisterId::CVRegCH, X86::CH},
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{codeview::RegisterId::CVRegCH, X86::CH},
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{ codeview::RegisterId::CVRegDH, X86::DH},
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{codeview::RegisterId::CVRegDH, X86::DH},
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{ codeview::RegisterId::CVRegBH, X86::BH},
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{codeview::RegisterId::CVRegBH, X86::BH},
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{ codeview::RegisterId::CVRegAX, X86::AX},
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{codeview::RegisterId::CVRegAX, X86::AX},
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{ codeview::RegisterId::CVRegCX, X86::CX},
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{codeview::RegisterId::CVRegCX, X86::CX},
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{ codeview::RegisterId::CVRegDX, X86::DX},
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{codeview::RegisterId::CVRegDX, X86::DX},
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{ codeview::RegisterId::CVRegBX, X86::BX},
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{codeview::RegisterId::CVRegBX, X86::BX},
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{ codeview::RegisterId::CVRegSP, X86::SP},
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{codeview::RegisterId::CVRegSP, X86::SP},
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{ codeview::RegisterId::CVRegBP, X86::BP},
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{codeview::RegisterId::CVRegBP, X86::BP},
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{ codeview::RegisterId::CVRegSI, X86::SI},
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{codeview::RegisterId::CVRegSI, X86::SI},
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{ codeview::RegisterId::CVRegDI, X86::DI},
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{codeview::RegisterId::CVRegDI, X86::DI},
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{ codeview::RegisterId::CVRegEAX, X86::EAX},
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{codeview::RegisterId::CVRegEAX, X86::EAX},
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{ codeview::RegisterId::CVRegECX, X86::ECX},
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{codeview::RegisterId::CVRegECX, X86::ECX},
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{ codeview::RegisterId::CVRegEDX, X86::EDX},
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{codeview::RegisterId::CVRegEDX, X86::EDX},
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{ codeview::RegisterId::CVRegEBX, X86::EBX},
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{codeview::RegisterId::CVRegEBX, X86::EBX},
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{ codeview::RegisterId::CVRegESP, X86::ESP},
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{codeview::RegisterId::CVRegESP, X86::ESP},
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{ codeview::RegisterId::CVRegEBP, X86::EBP},
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{codeview::RegisterId::CVRegEBP, X86::EBP},
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{ codeview::RegisterId::CVRegESI, X86::ESI},
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{codeview::RegisterId::CVRegESI, X86::ESI},
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{ codeview::RegisterId::CVRegEDI, X86::EDI},
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{codeview::RegisterId::CVRegEDI, X86::EDI},
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{ codeview::RegisterId::CVRegEFLAGS, X86::EFLAGS},
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{codeview::RegisterId::CVRegEFLAGS, X86::EFLAGS},
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{ codeview::RegisterId::CVRegST0, X86::FP0},
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{codeview::RegisterId::CVRegST0, X86::FP0},
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{ codeview::RegisterId::CVRegST1, X86::FP1},
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{codeview::RegisterId::CVRegST1, X86::FP1},
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{ codeview::RegisterId::CVRegST2, X86::FP2},
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{codeview::RegisterId::CVRegST2, X86::FP2},
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{ codeview::RegisterId::CVRegST3, X86::FP3},
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{codeview::RegisterId::CVRegST3, X86::FP3},
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{ codeview::RegisterId::CVRegST4, X86::FP4},
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{codeview::RegisterId::CVRegST4, X86::FP4},
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{ codeview::RegisterId::CVRegST5, X86::FP5},
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{codeview::RegisterId::CVRegST5, X86::FP5},
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{ codeview::RegisterId::CVRegST6, X86::FP6},
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{codeview::RegisterId::CVRegST6, X86::FP6},
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{ codeview::RegisterId::CVRegST7, X86::FP7},
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{codeview::RegisterId::CVRegST7, X86::FP7},
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{ codeview::RegisterId::CVRegXMM0, X86::XMM0},
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{codeview::RegisterId::CVRegXMM0, X86::XMM0},
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{ codeview::RegisterId::CVRegXMM1, X86::XMM1},
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{codeview::RegisterId::CVRegXMM1, X86::XMM1},
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{ codeview::RegisterId::CVRegXMM2, X86::XMM2},
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{codeview::RegisterId::CVRegXMM2, X86::XMM2},
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{ codeview::RegisterId::CVRegXMM3, X86::XMM3},
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{codeview::RegisterId::CVRegXMM3, X86::XMM3},
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{ codeview::RegisterId::CVRegXMM4, X86::XMM4},
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{codeview::RegisterId::CVRegXMM4, X86::XMM4},
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{ codeview::RegisterId::CVRegXMM5, X86::XMM5},
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{codeview::RegisterId::CVRegXMM5, X86::XMM5},
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{ codeview::RegisterId::CVRegXMM6, X86::XMM6},
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{codeview::RegisterId::CVRegXMM6, X86::XMM6},
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{ codeview::RegisterId::CVRegXMM7, X86::XMM7},
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{codeview::RegisterId::CVRegXMM7, X86::XMM7},
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{ codeview::RegisterId::CVRegXMM8, X86::XMM8},
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{codeview::RegisterId::CVRegXMM8, X86::XMM8},
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{ codeview::RegisterId::CVRegXMM9, X86::XMM9},
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{codeview::RegisterId::CVRegXMM9, X86::XMM9},
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{ codeview::RegisterId::CVRegXMM10, X86::XMM10},
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{codeview::RegisterId::CVRegXMM10, X86::XMM10},
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{ codeview::RegisterId::CVRegXMM11, X86::XMM11},
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{codeview::RegisterId::CVRegXMM11, X86::XMM11},
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{ codeview::RegisterId::CVRegXMM12, X86::XMM12},
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{codeview::RegisterId::CVRegXMM12, X86::XMM12},
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{ codeview::RegisterId::CVRegXMM13, X86::XMM13},
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{codeview::RegisterId::CVRegXMM13, X86::XMM13},
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{ codeview::RegisterId::CVRegXMM14, X86::XMM14},
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{codeview::RegisterId::CVRegXMM14, X86::XMM14},
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{ codeview::RegisterId::CVRegXMM15, X86::XMM15},
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{codeview::RegisterId::CVRegXMM15, X86::XMM15},
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{ codeview::RegisterId::CVRegSIL, X86::SIL},
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{codeview::RegisterId::CVRegSIL, X86::SIL},
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{ codeview::RegisterId::CVRegDIL, X86::DIL},
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{codeview::RegisterId::CVRegDIL, X86::DIL},
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{ codeview::RegisterId::CVRegBPL, X86::BPL},
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{codeview::RegisterId::CVRegBPL, X86::BPL},
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{ codeview::RegisterId::CVRegSPL, X86::SPL},
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{codeview::RegisterId::CVRegSPL, X86::SPL},
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{ codeview::RegisterId::CVRegRAX, X86::RAX},
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{codeview::RegisterId::CVRegRAX, X86::RAX},
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{ codeview::RegisterId::CVRegRBX, X86::RBX},
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{codeview::RegisterId::CVRegRBX, X86::RBX},
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{ codeview::RegisterId::CVRegRCX, X86::RCX},
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{codeview::RegisterId::CVRegRCX, X86::RCX},
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{ codeview::RegisterId::CVRegRDX, X86::RDX},
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{codeview::RegisterId::CVRegRDX, X86::RDX},
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{ codeview::RegisterId::CVRegRSI, X86::RSI},
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{codeview::RegisterId::CVRegRSI, X86::RSI},
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{ codeview::RegisterId::CVRegRDI, X86::RDI},
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{codeview::RegisterId::CVRegRDI, X86::RDI},
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{ codeview::RegisterId::CVRegRBP, X86::RBP},
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{codeview::RegisterId::CVRegRBP, X86::RBP},
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{ codeview::RegisterId::CVRegRSP, X86::RSP},
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{codeview::RegisterId::CVRegRSP, X86::RSP},
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{ codeview::RegisterId::CVRegR8, X86::R8},
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{codeview::RegisterId::CVRegR8, X86::R8},
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{ codeview::RegisterId::CVRegR9, X86::R9},
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{codeview::RegisterId::CVRegR9, X86::R9},
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{ codeview::RegisterId::CVRegR10, X86::R10},
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{codeview::RegisterId::CVRegR10, X86::R10},
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{ codeview::RegisterId::CVRegR11, X86::R11},
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{codeview::RegisterId::CVRegR11, X86::R11},
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{ codeview::RegisterId::CVRegR12, X86::R12},
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{codeview::RegisterId::CVRegR12, X86::R12},
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{ codeview::RegisterId::CVRegR13, X86::R13},
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{codeview::RegisterId::CVRegR13, X86::R13},
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{ codeview::RegisterId::CVRegR14, X86::R14},
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{codeview::RegisterId::CVRegR14, X86::R14},
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{ codeview::RegisterId::CVRegR15, X86::R15},
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{codeview::RegisterId::CVRegR15, X86::R15},
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{ codeview::RegisterId::CVRegR8B, X86::R8B},
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{codeview::RegisterId::CVRegR8B, X86::R8B},
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{ codeview::RegisterId::CVRegR9B, X86::R9B},
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{codeview::RegisterId::CVRegR9B, X86::R9B},
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{ codeview::RegisterId::CVRegR10B, X86::R10B},
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{codeview::RegisterId::CVRegR10B, X86::R10B},
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{ codeview::RegisterId::CVRegR11B, X86::R11B},
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{codeview::RegisterId::CVRegR11B, X86::R11B},
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{ codeview::RegisterId::CVRegR12B, X86::R12B},
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{codeview::RegisterId::CVRegR12B, X86::R12B},
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{ codeview::RegisterId::CVRegR13B, X86::R13B},
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{codeview::RegisterId::CVRegR13B, X86::R13B},
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{ codeview::RegisterId::CVRegR14B, X86::R14B},
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{codeview::RegisterId::CVRegR14B, X86::R14B},
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{ codeview::RegisterId::CVRegR15B, X86::R15B},
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{codeview::RegisterId::CVRegR15B, X86::R15B},
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{ codeview::RegisterId::CVRegR8W, X86::R8W},
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{codeview::RegisterId::CVRegR8W, X86::R8W},
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{ codeview::RegisterId::CVRegR9W, X86::R9W},
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{codeview::RegisterId::CVRegR9W, X86::R9W},
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{ codeview::RegisterId::CVRegR10W, X86::R10W},
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{codeview::RegisterId::CVRegR10W, X86::R10W},
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{ codeview::RegisterId::CVRegR11W, X86::R11W},
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{codeview::RegisterId::CVRegR11W, X86::R11W},
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{ codeview::RegisterId::CVRegR12W, X86::R12W},
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{codeview::RegisterId::CVRegR12W, X86::R12W},
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{ codeview::RegisterId::CVRegR13W, X86::R13W},
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{codeview::RegisterId::CVRegR13W, X86::R13W},
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{ codeview::RegisterId::CVRegR14W, X86::R14W},
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{codeview::RegisterId::CVRegR14W, X86::R14W},
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{ codeview::RegisterId::CVRegR15W, X86::R15W},
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{codeview::RegisterId::CVRegR15W, X86::R15W},
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{ codeview::RegisterId::CVRegR8D, X86::R8D},
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{codeview::RegisterId::CVRegR8D, X86::R8D},
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{ codeview::RegisterId::CVRegR9D, X86::R9D},
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{codeview::RegisterId::CVRegR9D, X86::R9D},
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{ codeview::RegisterId::CVRegR10D, X86::R10D},
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{codeview::RegisterId::CVRegR10D, X86::R10D},
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{ codeview::RegisterId::CVRegR11D, X86::R11D},
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{codeview::RegisterId::CVRegR11D, X86::R11D},
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{ codeview::RegisterId::CVRegR12D, X86::R12D},
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{codeview::RegisterId::CVRegR12D, X86::R12D},
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{ codeview::RegisterId::CVRegR13D, X86::R13D},
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{codeview::RegisterId::CVRegR13D, X86::R13D},
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{ codeview::RegisterId::CVRegR14D, X86::R14D},
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{codeview::RegisterId::CVRegR14D, X86::R14D},
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{ codeview::RegisterId::CVRegR15D, X86::R15D},
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{codeview::RegisterId::CVRegR15D, X86::R15D},
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{ codeview::RegisterId::CVRegAMD64_YMM0, X86::YMM0},
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{codeview::RegisterId::CVRegAMD64_YMM0, X86::YMM0},
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{ codeview::RegisterId::CVRegAMD64_YMM1, X86::YMM1},
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{codeview::RegisterId::CVRegAMD64_YMM1, X86::YMM1},
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{ codeview::RegisterId::CVRegAMD64_YMM2, X86::YMM2},
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{codeview::RegisterId::CVRegAMD64_YMM2, X86::YMM2},
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{ codeview::RegisterId::CVRegAMD64_YMM3, X86::YMM3},
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{codeview::RegisterId::CVRegAMD64_YMM3, X86::YMM3},
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{ codeview::RegisterId::CVRegAMD64_YMM4, X86::YMM4},
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{codeview::RegisterId::CVRegAMD64_YMM4, X86::YMM4},
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{ codeview::RegisterId::CVRegAMD64_YMM5, X86::YMM5},
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{codeview::RegisterId::CVRegAMD64_YMM5, X86::YMM5},
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{ codeview::RegisterId::CVRegAMD64_YMM6, X86::YMM6},
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{codeview::RegisterId::CVRegAMD64_YMM6, X86::YMM6},
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{ codeview::RegisterId::CVRegAMD64_YMM7, X86::YMM7},
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{codeview::RegisterId::CVRegAMD64_YMM7, X86::YMM7},
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{ codeview::RegisterId::CVRegAMD64_YMM8, X86::YMM8},
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{codeview::RegisterId::CVRegAMD64_YMM8, X86::YMM8},
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{ codeview::RegisterId::CVRegAMD64_YMM9, X86::YMM9},
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{codeview::RegisterId::CVRegAMD64_YMM9, X86::YMM9},
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{ codeview::RegisterId::CVRegAMD64_YMM10, X86::YMM10},
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{codeview::RegisterId::CVRegAMD64_YMM10, X86::YMM10},
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{ codeview::RegisterId::CVRegAMD64_YMM11, X86::YMM11},
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{codeview::RegisterId::CVRegAMD64_YMM11, X86::YMM11},
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{ codeview::RegisterId::CVRegAMD64_YMM12, X86::YMM12},
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{codeview::RegisterId::CVRegAMD64_YMM12, X86::YMM12},
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{ codeview::RegisterId::CVRegAMD64_YMM13, X86::YMM13},
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{codeview::RegisterId::CVRegAMD64_YMM13, X86::YMM13},
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{ codeview::RegisterId::CVRegAMD64_YMM14, X86::YMM14},
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{codeview::RegisterId::CVRegAMD64_YMM14, X86::YMM14},
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{ codeview::RegisterId::CVRegAMD64_YMM15, X86::YMM15},
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{codeview::RegisterId::CVRegAMD64_YMM15, X86::YMM15},
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{codeview::RegisterId::CVRegAMD64_YMM16, X86::YMM16},
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{codeview::RegisterId::CVRegAMD64_YMM17, X86::YMM17},
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{codeview::RegisterId::CVRegAMD64_YMM18, X86::YMM18},
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{codeview::RegisterId::CVRegAMD64_YMM19, X86::YMM19},
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|
{codeview::RegisterId::CVRegAMD64_YMM20, X86::YMM20},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM21, X86::YMM21},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM22, X86::YMM22},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM23, X86::YMM23},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM24, X86::YMM24},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM25, X86::YMM25},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM26, X86::YMM26},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM27, X86::YMM27},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM28, X86::YMM28},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM29, X86::YMM29},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM30, X86::YMM30},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_YMM31, X86::YMM31},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM0, X86::ZMM0},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM1, X86::ZMM1},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM2, X86::ZMM2},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM3, X86::ZMM3},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM4, X86::ZMM4},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM5, X86::ZMM5},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM6, X86::ZMM6},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM7, X86::ZMM7},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM8, X86::ZMM8},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM9, X86::ZMM9},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM10, X86::ZMM10},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM11, X86::ZMM11},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM12, X86::ZMM12},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM13, X86::ZMM13},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM14, X86::ZMM14},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM15, X86::ZMM15},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM16, X86::ZMM16},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM17, X86::ZMM17},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM18, X86::ZMM18},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM19, X86::ZMM19},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM20, X86::ZMM20},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM21, X86::ZMM21},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM22, X86::ZMM22},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM23, X86::ZMM23},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM24, X86::ZMM24},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM25, X86::ZMM25},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM26, X86::ZMM26},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM27, X86::ZMM27},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM28, X86::ZMM28},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM29, X86::ZMM29},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM30, X86::ZMM30},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_ZMM31, X86::ZMM31},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K0, X86::K0},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K1, X86::K1},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K2, X86::K2},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K3, X86::K3},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K4, X86::K4},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K5, X86::K5},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K6, X86::K6},
|
||||||
|
{codeview::RegisterId::CVRegAMD64_K7, X86::K7},
|
||||||
};
|
};
|
||||||
for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
|
for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
|
||||||
MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));
|
MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user