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ARM: Add patterns for dbg

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llvm-svn: 216451
This commit is contained in:
Yi Kong 2014-08-26 12:47:26 +00:00
parent 1b0080d8e1
commit 7df6bd5f10
4 changed files with 17 additions and 2 deletions
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1
include/llvm/IR/IntrinsicsARM.td
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@ -132,6 +132,7 @@ def int_arm_crc32cw : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
// HINT
def int_arm_hint : Intrinsic<[], [llvm_i32_ty]>;
def int_arm_dbg : Intrinsic<[], [llvm_i32_ty]>;
//===----------------------------------------------------------------------===//
// RBIT

2
lib/Target/ARM/ARMInstrInfo.td
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@ -1966,7 +1966,7 @@ def SETEND : AXI<(outs), (ins setend_op:$end), MiscFrm, NoItinerary,
}
def DBG : AI<(outs), (ins imm0_15:$opt), MiscFrm, NoItinerary, "dbg", "\t$opt",
[]>, Requires<[IsARM, HasV7]> {
[(int_arm_dbg imm0_15:$opt)]>, Requires<[IsARM, HasV7]> {
bits<4> opt;
let Inst{27-4} = 0b001100100000111100001111;
let Inst{3-0} = opt;

3
lib/Target/ARM/ARMInstrThumb2.td
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@ -3720,7 +3720,8 @@ def : t2InstAlias<"sevl$p.w", (t2HINT 5, pred:$p)> {
let Predicates = [IsThumb2, HasV8];
}
def t2DBG : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "dbg", "\t$opt", []> {
def t2DBG : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "dbg", "\t$opt",
[(int_arm_dbg imm0_15:$opt)]> {
bits<4> opt;
let Inst{31-20} = 0b111100111010;
let Inst{19-16} = 0b1111;

13
test/CodeGen/ARM/dbg.ll Normal file
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@ -0,0 +1,13 @@
; RUN: llc -mtriple armv8-eabi -mcpu=cortex-a57 -o - %s | FileCheck %s
; RUN: llc -mtriple thumbv8-eabi -mcpu=cortex-a57 -o - %s | FileCheck %s
define void @hint_dbg() {
entry:
call void @llvm.arm.dbg(i32 0)
ret void
}
declare void @llvm.arm.dbg(i32)
; CHECK: dbg #0