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[X86] Relax restrictions on what setcc condition codes can be folded with a sext when AVX512 is enabled.

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We now allow all signed comparisons and not equal. The complement that needs to be added for this is no worse than the extend. And the vector output forms of pcmpeq/pcmpgt have better latency than the k-register version on SKX.

llvm-svn: 324294
This commit is contained in:
Craig Topper 2018-02-05 23:57:01 +00:00
parent e592043d6f
commit 7eb6729e53
3 changed files with 7 additions and 8 deletions
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3
lib/Target/X86/X86ISelLowering.cpp
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@ -36118,8 +36118,7 @@ static SDValue combineExtSetcc(SDNode *N, SelectionDAG &DAG,
// Don't fold if the condition code can't be handled by PCMPEQ/PCMPGT since // Don't fold if the condition code can't be handled by PCMPEQ/PCMPGT since
// that's the only integer compares with we have. // that's the only integer compares with we have.
ISD::CondCode CC = cast<CondCodeSDNode>(N0->getOperand(2))->get(); ISD::CondCode CC = cast<CondCodeSDNode>(N0->getOperand(2))->get();
if (ISD::isUnsignedIntSetCC(CC) || CC == ISD::SETLE || CC == ISD::SETGE || if (ISD::isUnsignedIntSetCC(CC))
CC == ISD::SETNE)
return SDValue(); return SDValue();
// Only do this combine if the extension will be fully consumed by the setcc. // Only do this combine if the extension will be fully consumed by the setcc.

4
test/CodeGen/X86/avx512-ext.ll
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@ -1415,8 +1415,8 @@ define <8 x i32> @sext_8i1_8i32(<8 x i32> %a1, <8 x i32> %a2) nounwind {
; ;
; SKX-LABEL: sext_8i1_8i32: ; SKX-LABEL: sext_8i1_8i32:
; SKX: # %bb.0: ; SKX: # %bb.0:
; SKX-NEXT: vpcmpled %ymm0, %ymm1, %k0 ; SKX-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0
; SKX-NEXT: vpmovm2d %k0, %ymm0 ; SKX-NEXT: vpternlogq $15, %ymm0, %ymm0, %ymm0
; SKX-NEXT: retq ; SKX-NEXT: retq
%x = icmp slt <8 x i32> %a1, %a2 %x = icmp slt <8 x i32> %a1, %a2
%x1 = xor <8 x i1>%x, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true> %x1 = xor <8 x i1>%x, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>

8
test/CodeGen/X86/avx512-schedule.ll
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@ -4365,14 +4365,14 @@ define i8 @trunc_8i16_to_8i1(<8 x i16> %a) {
define <8 x i32> @sext_8i1_8i32(<8 x i32> %a1, <8 x i32> %a2) nounwind { define <8 x i32> @sext_8i1_8i32(<8 x i32> %a1, <8 x i32> %a2) nounwind {
; GENERIC-LABEL: sext_8i1_8i32: ; GENERIC-LABEL: sext_8i1_8i32:
; GENERIC: # %bb.0: ; GENERIC: # %bb.0:
; GENERIC-NEXT: vpcmpled %ymm0, %ymm1, %k0 # sched: [3:1.00] ; GENERIC-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
; GENERIC-NEXT: vpmovm2d %k0, %ymm0 # sched: [1:0.33] ; GENERIC-NEXT: vpternlogq $15, %ymm0, %ymm0, %ymm0 # sched: [3:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00]
; ;
; SKX-LABEL: sext_8i1_8i32: ; SKX-LABEL: sext_8i1_8i32:
; SKX: # %bb.0: ; SKX: # %bb.0:
; SKX-NEXT: vpcmpled %ymm0, %ymm1, %k0 # sched: [3:1.00] ; SKX-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [1:0.50]
; SKX-NEXT: vpmovm2d %k0, %ymm0 # sched: [1:0.25] ; SKX-NEXT: vpternlogq $15, %ymm0, %ymm0, %ymm0 # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00] ; SKX-NEXT: retq # sched: [7:1.00]
%x = icmp slt <8 x i32> %a1, %a2 %x = icmp slt <8 x i32> %a1, %a2
%x1 = xor <8 x i1>%x, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true> %x1 = xor <8 x i1>%x, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>