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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00

don't repeat function names in comments; NFC

llvm-svn: 256569
This commit is contained in:
Sanjay Patel 2015-12-29 18:14:06 +00:00
parent 6eaa03403d
commit 7eb7397ebc

View File

@ -400,11 +400,10 @@ INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_END(PeepholeOptimizer, "peephole-opts", INITIALIZE_PASS_END(PeepholeOptimizer, "peephole-opts",
"Peephole Optimizations", false, false) "Peephole Optimizations", false, false)
/// optimizeExtInstr - If instruction is a copy-like instruction, i.e. it reads /// If instruction is a copy-like instruction, i.e. it reads a single register
/// a single register and writes a single register and it does not modify the /// and writes a single register and it does not modify the source, and if the
/// source, and if the source value is preserved as a sub-register of the /// source value is preserved as a sub-register of the result, then replace all
/// result, then replace all reachable uses of the source with the subreg of the /// reachable uses of the source with the subreg of the result.
/// result.
/// ///
/// Do not generate an EXTRACT that is used only in a debug use, as this changes /// Do not generate an EXTRACT that is used only in a debug use, as this changes
/// the code. Since this code does not currently share EXTRACTs, just ignore all /// the code. Since this code does not currently share EXTRACTs, just ignore all
@ -555,10 +554,10 @@ optimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
return Changed; return Changed;
} }
/// optimizeCmpInstr - If the instruction is a compare and the previous /// If the instruction is a compare and the previous instruction it's comparing
/// instruction it's comparing against all ready sets (or could be modified to /// against already sets (or could be modified to set) the same flag as the
/// set) the same flag as the compare, then we can remove the comparison and use /// compare, then we can remove the comparison and use the flag from the
/// the flag from the previous instruction. /// previous instruction.
bool PeepholeOptimizer::optimizeCmpInstr(MachineInstr *MI, bool PeepholeOptimizer::optimizeCmpInstr(MachineInstr *MI,
MachineBasicBlock *MBB) { MachineBasicBlock *MBB) {
// If this instruction is a comparison against zero and isn't comparing a // If this instruction is a comparison against zero and isn't comparing a
@ -1290,9 +1289,9 @@ bool PeepholeOptimizer::optimizeUncoalescableCopy(
return true; return true;
} }
/// isLoadFoldable - Check whether MI is a candidate for folding into a later /// Check whether MI is a candidate for folding into a later instruction.
/// instruction. We only fold loads to virtual registers and the virtual /// We only fold loads to virtual registers and the virtual register defined
/// register defined has a single use. /// has a single use.
bool PeepholeOptimizer::isLoadFoldable( bool PeepholeOptimizer::isLoadFoldable(
MachineInstr *MI, MachineInstr *MI,
SmallSet<unsigned, 16> &FoldAsLoadDefCandidates) { SmallSet<unsigned, 16> &FoldAsLoadDefCandidates) {
@ -1333,8 +1332,8 @@ bool PeepholeOptimizer::isMoveImmediate(MachineInstr *MI,
return false; return false;
} }
/// foldImmediate - Try folding register operands that are defined by move /// Try folding register operands that are defined by move immediate
/// immediate instructions, i.e. a trivial constant folding optimization, if /// instructions, i.e. a trivial constant folding optimization, if
/// and only if the def and use are in the same BB. /// and only if the def and use are in the same BB.
bool PeepholeOptimizer::foldImmediate(MachineInstr *MI, MachineBasicBlock *MBB, bool PeepholeOptimizer::foldImmediate(MachineInstr *MI, MachineBasicBlock *MBB,
SmallSet<unsigned, 4> &ImmDefRegs, SmallSet<unsigned, 4> &ImmDefRegs,