From 7eec1d8532cff030b9d53bce7aae4d6b3603e1e6 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Mon, 13 Jan 2014 10:47:04 +0000 Subject: [PATCH] Docs: fix sign of division and increase equivocation on code generated. I should have been a politician. llvm-svn: 199092 --- docs/CodeGenerator.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/CodeGenerator.rst b/docs/CodeGenerator.rst index c87a6286727..b89d2f426f3 100644 --- a/docs/CodeGenerator.rst +++ b/docs/CodeGenerator.rst @@ -434,12 +434,12 @@ For example, consider this simple LLVM example: .. code-block:: llvm define i32 @test(i32 %X, i32 %Y) { - %Z = udiv i32 %X, %Y + %Z = sdiv i32 %X, %Y ret i32 %Z } -The X86 instruction selector produces this machine code for the ``div`` and -``ret`` (use "``llc X.bc -march=x86 -print-machineinstrs``" to get this): +The X86 instruction selector might produce this machine code for the ``div`` and +``ret``: .. code-block:: llvm @@ -454,8 +454,8 @@ The X86 instruction selector produces this machine code for the ``div`` and %EAX = mov %reg1026 ;; 32-bit return value goes in EAX ret -By the end of code generation, the register allocator has coalesced the -registers and deleted the resultant identity moves producing the following +By the end of code generation, the register allocator would coalesce the +registers and delete the resultant identity moves producing the following code: .. code-block:: llvm