From 7f1530ba60bdf800fc71fd8ae1244a48a012e44f Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Wed, 16 Nov 2016 14:12:11 +0000 Subject: [PATCH] [X86] Regenerated integer divide tests to test on 32 and 64 bit targets llvm-svn: 287104 --- test/CodeGen/X86/divide-by-constant.ll | 273 ++++++++++++++++++++----- test/CodeGen/X86/divrem.ll | 247 +++++++++++++++++++++- test/CodeGen/X86/divrem8_ext.ll | 232 +++++++++++++++------ 3 files changed, 631 insertions(+), 121 deletions(-) diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll index 9543d6c4d74..431f3672910 100644 --- a/test/CodeGen/X86/divide-by-constant.ll +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -1,128 +1,297 @@ -; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -asm-verbose=0 | FileCheck %s -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=X64 define zeroext i16 @test1(i16 zeroext %x) nounwind { +; X32-LABEL: test1: +; X32: # BB#0: # %entry +; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X32-NEXT: imull $63551, %eax, %eax # imm = 0xF83F +; X32-NEXT: shrl $21, %eax +; X32-NEXT: # kill: %AX %AX %EAX +; X32-NEXT: retl +; +; X64-LABEL: test1: +; X64: # BB#0: # %entry +; X64-NEXT: imull $63551, %edi, %eax # imm = 0xF83F +; X64-NEXT: shrl $21, %eax +; X64-NEXT: # kill: %AX %AX %EAX +; X64-NEXT: retq entry: %div = udiv i16 %x, 33 ret i16 %div -; CHECK-LABEL: test1: -; CHECK: imull $63551, %eax -; CHECK-NEXT: shrl $21, %eax -; CHECK-NEXT: ret } define zeroext i16 @test2(i8 signext %x, i16 zeroext %c) nounwind readnone ssp noredzone { +; X32-LABEL: test2: +; X32: # BB#0: # %entry +; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X32-NEXT: imull $43691, %eax, %eax # imm = 0xAAAB +; X32-NEXT: shrl $17, %eax +; X32-NEXT: # kill: %AX %AX %EAX +; X32-NEXT: retl +; +; X64-LABEL: test2: +; X64: # BB#0: # %entry +; X64-NEXT: imull $43691, %esi, %eax # imm = 0xAAAB +; X64-NEXT: shrl $17, %eax +; X64-NEXT: # kill: %AX %AX %EAX +; X64-NEXT: retq entry: %div = udiv i16 %c, 3 ret i16 %div -; CHECK-LABEL: test2: -; CHECK: imull $43691, %eax -; CHECK-NEXT: shrl $17, %eax -; CHECK-NEXT: ret } define zeroext i8 @test3(i8 zeroext %x, i8 zeroext %c) nounwind readnone ssp noredzone { +; X32-LABEL: test3: +; X32: # BB#0: # %entry +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: imull $171, %eax, %eax +; X32-NEXT: andl $65024, %eax # imm = 0xFE00 +; X32-NEXT: shrl $9, %eax +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test3: +; X64: # BB#0: # %entry +; X64-NEXT: imull $171, %esi, %eax +; X64-NEXT: andl $65024, %eax # imm = 0xFE00 +; X64-NEXT: shrl $9, %eax +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq entry: %div = udiv i8 %c, 3 ret i8 %div - -; CHECK-LABEL: test3: -; CHECK: movzbl 8(%esp), %eax -; CHECK-NEXT: imull $171, %eax -; CHECK-NEXT: andl $65024, %eax -; CHECK-NEXT: shrl $9, %eax -; CHECK-NEXT: ret } define signext i16 @test4(i16 signext %x) nounwind { +; X32-LABEL: test4: +; X32: # BB#0: # %entry +; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax +; X32-NEXT: imull $1986, %eax, %eax # imm = 0x7C2 +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: shrl $31, %ecx +; X32-NEXT: shrl $16, %eax +; X32-NEXT: addl %ecx, %eax +; X32-NEXT: # kill: %AX %AX %EAX +; X32-NEXT: retl +; +; X64-LABEL: test4: +; X64: # BB#0: # %entry +; X64-NEXT: imull $1986, %edi, %eax # imm = 0x7C2 +; X64-NEXT: movl %eax, %ecx +; X64-NEXT: shrl $31, %ecx +; X64-NEXT: shrl $16, %eax +; X64-NEXT: addl %ecx, %eax +; X64-NEXT: # kill: %AX %AX %EAX +; X64-NEXT: retq entry: %div = sdiv i16 %x, 33 ; [#uses=1] ret i16 %div -; CHECK-LABEL: test4: -; CHECK: imull $1986, %eax } define i32 @test5(i32 %A) nounwind { +; X32-LABEL: test5: +; X32: # BB#0: +; X32-NEXT: movl $365384439, %eax # imm = 0x15C752F7 +; X32-NEXT: mull {{[0-9]+}}(%esp) +; X32-NEXT: shrl $27, %edx +; X32-NEXT: movl %edx, %eax +; X32-NEXT: retl +; +; X64-LABEL: test5: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: imulq $365384439, %rax, %rax # imm = 0x15C752F7 +; X64-NEXT: shrq $59, %rax +; X64-NEXT: # kill: %EAX %EAX %RAX +; X64-NEXT: retq %tmp1 = udiv i32 %A, 1577682821 ; [#uses=1] ret i32 %tmp1 -; CHECK-LABEL: test5: -; CHECK: movl $365384439, %eax -; CHECK: mull 4(%esp) } define signext i16 @test6(i16 signext %x) nounwind { +; X32-LABEL: test6: +; X32: # BB#0: # %entry +; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax +; X32-NEXT: imull $26215, %eax, %eax # imm = 0x6667 +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: shrl $31, %ecx +; X32-NEXT: sarl $18, %eax +; X32-NEXT: addl %ecx, %eax +; X32-NEXT: # kill: %AX %AX %EAX +; X32-NEXT: retl +; +; X64-LABEL: test6: +; X64: # BB#0: # %entry +; X64-NEXT: imull $26215, %edi, %eax # imm = 0x6667 +; X64-NEXT: movl %eax, %ecx +; X64-NEXT: shrl $31, %ecx +; X64-NEXT: sarl $18, %eax +; X64-NEXT: addl %ecx, %eax +; X64-NEXT: # kill: %AX %AX %EAX +; X64-NEXT: retq entry: %div = sdiv i16 %x, 10 ret i16 %div -; CHECK-LABEL: test6: -; CHECK: imull $26215, %eax -; CHECK: movl %eax, %ecx -; CHECK: shrl $31, %ecx -; CHECK: sarl $18, %eax } define i32 @test7(i32 %x) nounwind { +; X32-LABEL: test7: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: shrl $2, %eax +; X32-NEXT: movl $613566757, %ecx # imm = 0x24924925 +; X32-NEXT: mull %ecx +; X32-NEXT: movl %edx, %eax +; X32-NEXT: retl +; +; X64-LABEL: test7: +; X64: # BB#0: +; X64-NEXT: # kill: %EDI %EDI %RDI +; X64-NEXT: shrl $2, %edi +; X64-NEXT: imulq $613566757, %rdi, %rax # imm = 0x24924925 +; X64-NEXT: shrq $32, %rax +; X64-NEXT: # kill: %EAX %EAX %RAX +; X64-NEXT: retq %div = udiv i32 %x, 28 ret i32 %div -; CHECK-LABEL: test7: -; CHECK: shrl $2 -; CHECK: movl $613566757 -; CHECK: mull -; CHECK-NOT: shrl -; CHECK: ret } ; PR13326 define i8 @test8(i8 %x) nounwind { +; X32-LABEL: test8: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: shrb %al +; X32-NEXT: movzbl %al, %eax +; X32-NEXT: imull $211, %eax, %eax +; X32-NEXT: andl $24576, %eax # imm = 0x6000 +; X32-NEXT: shrl $13, %eax +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test8: +; X64: # BB#0: +; X64-NEXT: shrb %dil +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: imull $211, %eax, %eax +; X64-NEXT: andl $24576, %eax # imm = 0x6000 +; X64-NEXT: shrl $13, %eax +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %div = udiv i8 %x, 78 ret i8 %div -; CHECK-LABEL: test8: -; CHECK: shrb % -; CHECK: imull $211 -; CHECK: shrl $13 -; CHECK: ret } define i8 @test9(i8 %x) nounwind { +; X32-LABEL: test9: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: shrb $2, %al +; X32-NEXT: movzbl %al, %eax +; X32-NEXT: imull $71, %eax, %eax +; X32-NEXT: andl $6144, %eax # imm = 0x1800 +; X32-NEXT: shrl $11, %eax +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test9: +; X64: # BB#0: +; X64-NEXT: shrb $2, %dil +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: imull $71, %eax, %eax +; X64-NEXT: andl $6144, %eax # imm = 0x1800 +; X64-NEXT: shrl $11, %eax +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %div = udiv i8 %x, 116 ret i8 %div -; CHECK-LABEL: test9: -; CHECK: shrb $2 -; CHECK: imull $71 -; CHECK: shrl $11 -; CHECK: ret } define i32 @testsize1(i32 %x) minsize nounwind { +; X32-LABEL: testsize1: +; X32: # BB#0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: pushl $32 +; X32-NEXT: popl %ecx +; X32-NEXT: cltd +; X32-NEXT: idivl %ecx +; X32-NEXT: retl +; +; X64-LABEL: testsize1: +; X64: # BB#0: # %entry +; X64-NEXT: pushq $32 +; X64-NEXT: popq %rcx +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cltd +; X64-NEXT: idivl %ecx +; X64-NEXT: retq entry: %div = sdiv i32 %x, 32 ret i32 %div -; CHECK-LABEL: testsize1: -; CHECK: divl } define i32 @testsize2(i32 %x) minsize nounwind { +; X32-LABEL: testsize2: +; X32: # BB#0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: pushl $33 +; X32-NEXT: popl %ecx +; X32-NEXT: cltd +; X32-NEXT: idivl %ecx +; X32-NEXT: retl +; +; X64-LABEL: testsize2: +; X64: # BB#0: # %entry +; X64-NEXT: pushq $33 +; X64-NEXT: popq %rcx +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cltd +; X64-NEXT: idivl %ecx +; X64-NEXT: retq entry: %div = sdiv i32 %x, 33 ret i32 %div -; CHECK-LABEL: testsize2: -; CHECK: divl } define i32 @testsize3(i32 %x) minsize nounwind { +; X32-LABEL: testsize3: +; X32: # BB#0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: shrl $5, %eax +; X32-NEXT: retl +; +; X64-LABEL: testsize3: +; X64: # BB#0: # %entry +; X64-NEXT: shrl $5, %edi +; X64-NEXT: movl %edi, %eax +; X64-NEXT: retq entry: %div = udiv i32 %x, 32 ret i32 %div -; CHECK-LABEL: testsize3: -; CHECK: shrl } define i32 @testsize4(i32 %x) minsize nounwind { +; X32-LABEL: testsize4: +; X32: # BB#0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: pushl $33 +; X32-NEXT: popl %ecx +; X32-NEXT: xorl %edx, %edx +; X32-NEXT: divl %ecx +; X32-NEXT: retl +; +; X64-LABEL: testsize4: +; X64: # BB#0: # %entry +; X64-NEXT: pushq $33 +; X64-NEXT: popq %rcx +; X64-NEXT: xorl %edx, %edx +; X64-NEXT: movl %edi, %eax +; X64-NEXT: divl %ecx +; X64-NEXT: retq entry: %div = udiv i32 %x, 33 ret i32 %div -; CHECK-LABEL: testsize4: -; CHECK: divl } diff --git a/test/CodeGen/X86/divrem.ll b/test/CodeGen/X86/divrem.ll index e86b52fe82d..73d16060be7 100644 --- a/test/CodeGen/X86/divrem.ll +++ b/test/CodeGen/X86/divrem.ll @@ -1,55 +1,284 @@ -; RUN: llc < %s -march=x86-64 | grep div | count 8 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 -define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) { +define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind { +; X32-LABEL: si64: +; X32: # BB#0: +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl %edi +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: calll __divdi3 +; X32-NEXT: addl $16, %esp +; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %edx, %edi +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: calll __moddi3 +; X32-NEXT: addl $16, %esp +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl %edi, 4(%ecx) +; X32-NEXT: movl %esi, (%ecx) +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl %edx, 4(%ecx) +; X32-NEXT: movl %eax, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: popl %edi +; X32-NEXT: popl %ebx +; X32-NEXT: popl %ebp +; X32-NEXT: retl +; +; X64-LABEL: si64: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: movq %rdi, %rax +; X64-NEXT: cqto +; X64-NEXT: idivq %rsi +; X64-NEXT: movq %rax, (%r8) +; X64-NEXT: movq %rdx, (%rcx) +; X64-NEXT: retq %r = sdiv i64 %x, %y %t = srem i64 %x, %y store i64 %r, i64* %p store i64 %t, i64* %q ret void } -define void @si32(i32 %x, i32 %y, i32* %p, i32* %q) { + +define void @si32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind { +; X32-LABEL: si32: +; X32: # BB#0: +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: cltd +; X32-NEXT: idivl {{[0-9]+}}(%esp) +; X32-NEXT: movl %eax, (%esi) +; X32-NEXT: movl %edx, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: retl +; +; X64-LABEL: si32: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cltd +; X64-NEXT: idivl %esi +; X64-NEXT: movl %eax, (%r8) +; X64-NEXT: movl %edx, (%rcx) +; X64-NEXT: retq %r = sdiv i32 %x, %y %t = srem i32 %x, %y store i32 %r, i32* %p store i32 %t, i32* %q ret void } -define void @si16(i16 %x, i16 %y, i16* %p, i16* %q) { + +define void @si16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind { +; X32-LABEL: si16: +; X32: # BB#0: +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %esi +; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X32-NEXT: cwtd +; X32-NEXT: idivw {{[0-9]+}}(%esp) +; X32-NEXT: movw %ax, (%esi) +; X32-NEXT: movw %dx, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: retl +; +; X64-LABEL: si16: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cwtd +; X64-NEXT: idivw %si +; X64-NEXT: movw %ax, (%r8) +; X64-NEXT: movw %dx, (%rcx) +; X64-NEXT: retq %r = sdiv i16 %x, %y %t = srem i16 %x, %y store i16 %r, i16* %p store i16 %t, i16* %q ret void } -define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) { + +define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { +; X32-LABEL: si8: +; X32: # BB#0: +; X32-NEXT: pushl %ebx +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: cbtw +; X32-NEXT: idivb {{[0-9]+}}(%esp) +; X32-NEXT: movsbl %ah, %ebx # NOREX +; X32-NEXT: movb %al, (%edx) +; X32-NEXT: movb %bl, (%ecx) +; X32-NEXT: popl %ebx +; X32-NEXT: retl +; +; X64-LABEL: si8: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cbtw +; X64-NEXT: idivb %sil +; X64-NEXT: movsbl %ah, %esi # NOREX +; X64-NEXT: movb %al, (%rdx) +; X64-NEXT: movb %sil, (%rcx) +; X64-NEXT: retq %r = sdiv i8 %x, %y %t = srem i8 %x, %y store i8 %r, i8* %p store i8 %t, i8* %q ret void } -define void @ui64(i64 %x, i64 %y, i64* %p, i64* %q) { + +define void @ui64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind { +; X32-LABEL: ui64: +; X32: # BB#0: +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl %edi +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: calll __udivdi3 +; X32-NEXT: addl $16, %esp +; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %edx, %edi +; X32-NEXT: pushl %ebp +; X32-NEXT: pushl %ebx +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: pushl {{[0-9]+}}(%esp) +; X32-NEXT: calll __umoddi3 +; X32-NEXT: addl $16, %esp +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl %edi, 4(%ecx) +; X32-NEXT: movl %esi, (%ecx) +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl %edx, 4(%ecx) +; X32-NEXT: movl %eax, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: popl %edi +; X32-NEXT: popl %ebx +; X32-NEXT: popl %ebp +; X32-NEXT: retl +; +; X64-LABEL: ui64: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: xorl %edx, %edx +; X64-NEXT: movq %rdi, %rax +; X64-NEXT: divq %rsi +; X64-NEXT: movq %rax, (%r8) +; X64-NEXT: movq %rdx, (%rcx) +; X64-NEXT: retq %r = udiv i64 %x, %y %t = urem i64 %x, %y store i64 %r, i64* %p store i64 %t, i64* %q ret void } -define void @ui32(i32 %x, i32 %y, i32* %p, i32* %q) { + +define void @ui32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind { +; X32-LABEL: ui32: +; X32: # BB#0: +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: xorl %edx, %edx +; X32-NEXT: divl {{[0-9]+}}(%esp) +; X32-NEXT: movl %eax, (%esi) +; X32-NEXT: movl %edx, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: retl +; +; X64-LABEL: ui32: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: xorl %edx, %edx +; X64-NEXT: movl %edi, %eax +; X64-NEXT: divl %esi +; X64-NEXT: movl %eax, (%r8) +; X64-NEXT: movl %edx, (%rcx) +; X64-NEXT: retq %r = udiv i32 %x, %y %t = urem i32 %x, %y store i32 %r, i32* %p store i32 %t, i32* %q ret void } -define void @ui16(i16 %x, i16 %y, i16* %p, i16* %q) { + +define void @ui16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind { +; X32-LABEL: ui16: +; X32: # BB#0: +; X32-NEXT: pushl %esi +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %esi +; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X32-NEXT: xorl %edx, %edx +; X32-NEXT: divw {{[0-9]+}}(%esp) +; X32-NEXT: movw %ax, (%esi) +; X32-NEXT: movw %dx, (%ecx) +; X32-NEXT: popl %esi +; X32-NEXT: retl +; +; X64-LABEL: ui16: +; X64: # BB#0: +; X64-NEXT: movq %rdx, %r8 +; X64-NEXT: xorl %edx, %edx +; X64-NEXT: movl %edi, %eax +; X64-NEXT: divw %si +; X64-NEXT: movw %ax, (%r8) +; X64-NEXT: movw %dx, (%rcx) +; X64-NEXT: retq %r = udiv i16 %x, %y %t = urem i16 %x, %y store i16 %r, i16* %p store i16 %t, i16* %q ret void } -define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) { + +define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { +; X32-LABEL: ui8: +; X32: # BB#0: +; X32-NEXT: pushl %ebx +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb {{[0-9]+}}(%esp) +; X32-NEXT: movzbl %ah, %ebx # NOREX +; X32-NEXT: movb %al, (%edx) +; X32-NEXT: movb %bl, (%ecx) +; X32-NEXT: popl %ebx +; X32-NEXT: retl +; +; X64-LABEL: ui8: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %esi # NOREX +; X64-NEXT: movb %al, (%rdx) +; X64-NEXT: movb %sil, (%rcx) +; X64-NEXT: retq %r = udiv i8 %x, %y %t = urem i8 %x, %y store i8 %r, i8* %p diff --git a/test/CodeGen/X86/divrem8_ext.ll b/test/CodeGen/X86/divrem8_ext.ll index b38797e2d9d..fc516001aa5 100644 --- a/test/CodeGen/X86/divrem8_ext.ll +++ b/test/CodeGen/X86/divrem8_ext.ll @@ -1,15 +1,27 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-64 -; RUN: llc -march=x86 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-32 -target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" -target triple = "x86_64-apple-macosx10.10.0" +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_udivrem_zext_ah -; CHECK: divb -; CHECK: movzbl %ah, [[REG_REM:%[a-z0-9]+]] -; CHECK: movb %al, ([[REG_ZPTR:%[a-z0-9]+]]) -; CHECK: movl [[REG_REM]], %eax -; CHECK: ret +; X32-LABEL: test_udivrem_zext_ah: +; X32: # BB#0: +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb {{[0-9]+}}(%esp) +; X32-NEXT: movzbl %ah, %ecx # NOREX +; X32-NEXT: movb %al, z +; X32-NEXT: movl %ecx, %eax +; X32-NEXT: retl +; +; X64-LABEL: test_udivrem_zext_ah: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %ecx # NOREX +; X64-NEXT: movb %al, {{.*}}(%rip) +; X64-NEXT: movl %ecx, %eax +; X64-NEXT: retq %div = udiv i8 %x, %y store i8 %div, i8* @z %1 = urem i8 %x, %y @@ -17,44 +29,96 @@ define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) { } define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_urem_zext_ah -; CHECK: divb -; CHECK: movzbl %ah, %eax -; CHECK: ret +; X32-LABEL: test_urem_zext_ah: +; X32: # BB#0: +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb {{[0-9]+}}(%esp) +; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test_urem_zext_ah: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %1 = urem i8 %x, %y ret i8 %1 } define i8 @test_urem_noext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_urem_noext_ah -; CHECK: divb [[REG_X:%[a-z0-9]+]] -; CHECK: movzbl %ah, %eax -; CHECK: addb [[REG_X]], %al -; CHECK: ret +; X32-LABEL: test_urem_noext_ah: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %cl +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb %cl +; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: addb %cl, %al +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test_urem_noext_ah: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: addb %sil, %al +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %1 = urem i8 %x, %y %2 = add i8 %1, %y ret i8 %2 } define i64 @test_urem_zext64_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_urem_zext64_ah -; CHECK: divb -; CHECK: movzbl %ah, %eax -; CHECK-32: xorl %edx, %edx -; CHECK: ret +; X32-LABEL: test_urem_zext64_ah: +; X32: # BB#0: +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb {{[0-9]+}}(%esp) +; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: xorl %edx, %edx +; X32-NEXT: retl +; +; X64-LABEL: test_urem_zext64_ah: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: movzbl %al, %eax +; X64-NEXT: retq %1 = urem i8 %x, %y %2 = zext i8 %1 to i64 ret i64 %2 } define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_sdivrem_sext_ah -; CHECK: cbtw -; CHECK: idivb -; CHECK: movsbl %ah, [[REG_REM:%[a-z0-9]+]] -; CHECK: movb %al, ([[REG_ZPTR]]) -; CHECK: movl [[REG_REM]], %eax -; CHECK: ret +; X32-LABEL: test_sdivrem_sext_ah: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: cbtw +; X32-NEXT: idivb {{[0-9]+}}(%esp) +; X32-NEXT: movsbl %ah, %ecx # NOREX +; X32-NEXT: movb %al, z +; X32-NEXT: movl %ecx, %eax +; X32-NEXT: retl +; +; X64-LABEL: test_sdivrem_sext_ah: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cbtw +; X64-NEXT: idivb %sil +; X64-NEXT: movsbl %ah, %ecx # NOREX +; X64-NEXT: movb %al, {{.*}}(%rip) +; X64-NEXT: movl %ecx, %eax +; X64-NEXT: retq %div = sdiv i8 %x, %y store i8 %div, i8* @z %1 = srem i8 %x, %y @@ -62,52 +126,100 @@ define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) { } define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_srem_sext_ah -; CHECK: cbtw -; CHECK: idivb -; CHECK: movsbl %ah, %eax -; CHECK: ret +; X32-LABEL: test_srem_sext_ah: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: cbtw +; X32-NEXT: idivb {{[0-9]+}}(%esp) +; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test_srem_sext_ah: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cbtw +; X64-NEXT: idivb %sil +; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %1 = srem i8 %x, %y ret i8 %1 } define i8 @test_srem_noext_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_srem_noext_ah -; CHECK: cbtw -; CHECK: idivb [[REG_X:%[a-z0-9]+]] -; CHECK: movsbl %ah, %eax -; CHECK: addb [[REG_X]], %al -; CHECK: ret +; X32-LABEL: test_srem_noext_ah: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: movb {{[0-9]+}}(%esp), %cl +; X32-NEXT: cbtw +; X32-NEXT: idivb %cl +; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: addb %cl, %al +; X32-NEXT: # kill: %AL %AL %EAX +; X32-NEXT: retl +; +; X64-LABEL: test_srem_noext_ah: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cbtw +; X64-NEXT: idivb %sil +; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: addb %sil, %al +; X64-NEXT: # kill: %AL %AL %EAX +; X64-NEXT: retq %1 = srem i8 %x, %y %2 = add i8 %1, %y ret i8 %2 } define i64 @test_srem_sext64_ah(i8 %x, i8 %y) { -; CHECK-LABEL: test_srem_sext64_ah -; CHECK: cbtw -; CHECK: idivb -; CHECK: movsbl %ah, %eax -; CHECK-32: movl %eax, %edx -; CHECK-32: sarl $31, %edx -; CHECK-64: movsbq %al, %rax -; CHECK: ret +; X32-LABEL: test_srem_sext64_ah: +; X32: # BB#0: +; X32-NEXT: movb {{[0-9]+}}(%esp), %al +; X32-NEXT: cbtw +; X32-NEXT: idivb {{[0-9]+}}(%esp) +; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: movl %eax, %edx +; X32-NEXT: sarl $31, %edx +; X32-NEXT: retl +; +; X64-LABEL: test_srem_sext64_ah: +; X64: # BB#0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: cbtw +; X64-NEXT: idivb %sil +; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: movsbq %al, %rax +; X64-NEXT: retq %1 = srem i8 %x, %y %2 = sext i8 %1 to i64 ret i64 %2 } define i64 @pr25754(i8 %a, i8 %c) { -; CHECK-LABEL: pr25754 -; CHECK: movzbl {{.+}}, %eax -; CHECK: divb -; CHECK: movzbl %ah, %ecx -; CHECK: movzbl %al, %eax -; CHECK-32: addl %ecx, %eax -; CHECK-32: sbbl %edx, %edx -; CHECK-32: andl $1, %edx -; CHECK-64: addq %rcx, %rax -; CHECK: ret +; X32-LABEL: pr25754: +; X32: # BB#0: +; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X32-NEXT: # kill: %EAX %EAX %AX +; X32-NEXT: divb {{[0-9]+}}(%esp) +; X32-NEXT: movzbl %ah, %ecx # NOREX +; X32-NEXT: movzbl %al, %eax +; X32-NEXT: addl %ecx, %eax +; X32-NEXT: sbbl %edx, %edx +; X32-NEXT: andl $1, %edx +; X32-NEXT: retl +; +; X64-LABEL: pr25754: +; X64: # BB#0: +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: # kill: %EAX %EAX %AX +; X64-NEXT: divb %sil +; X64-NEXT: movzbl %ah, %ecx # NOREX +; X64-NEXT: movzbl %cl, %ecx +; X64-NEXT: movzbl %al, %eax +; X64-NEXT: addq %rcx, %rax +; X64-NEXT: retq %r1 = urem i8 %a, %c %d1 = udiv i8 %a, %c %r2 = zext i8 %r1 to i64