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[X86] Add test cases for PR36721 (unnecessary andl for %cl when shifting)

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llvm-svn: 352321
This commit is contained in:
Simon Pilgrim 2019-01-27 18:31:33 +00:00
parent c0f3912d9d
commit 7f2d8b8b2f
1 changed files with 52 additions and 0 deletions
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test/CodeGen/X86/shift-and-x86_64.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define { i64, i64 } @PR36721_u8(i64, i64, i8 zeroext) nounwind {
; CHECK-LABEL: PR36721_u8:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: movq %rsi, %rdx
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: shldq %cl, %rdi, %rdx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
%4 = zext i64 %1 to i128
%5 = shl nuw i128 %4, 64
%6 = zext i64 %0 to i128
%7 = or i128 %5, %6
%8 = and i8 %2, 63
%9 = zext i8 %8 to i128
%10 = shl i128 %7, %9
%11 = trunc i128 %10 to i64
%12 = lshr i128 %10, 64
%13 = trunc i128 %12 to i64
%14 = insertvalue { i64, i64 } undef, i64 %11, 0
%15 = insertvalue { i64, i64 } %14, i64 %13, 1
ret { i64, i64 } %15
}
define { i64, i64 } @PR36721_u32(i64, i64, i32) nounwind {
; CHECK-LABEL: PR36721_u32:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: movq %rsi, %rdx
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: shldq %cl, %rdi, %rdx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
%4 = zext i64 %1 to i128
%5 = shl nuw i128 %4, 64
%6 = zext i64 %0 to i128
%7 = or i128 %5, %6
%8 = and i32 %2, 63
%9 = zext i32 %8 to i128
%10 = shl i128 %7, %9
%11 = trunc i128 %10 to i64
%12 = lshr i128 %10, 64
%13 = trunc i128 %12 to i64
%14 = insertvalue { i64, i64 } undef, i64 %11, 0
%15 = insertvalue { i64, i64 } %14, i64 %13, 1
ret { i64, i64 } %15
}