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[MCInstPrinter] Pass Address
parameter to MCOI::OPERAND_PCREL typed operands. NFC
Follow-up of D72172 and D72180 This patch passes `uint64_t Address` to print methods of PC-relative operands so that subsequent target specific patches can change `*InstPrinter::print{Operand,PCRelImm,...}` to customize the output. Add MCInstPrinter::PrintBranchImmAsAddress which is set to true by llvm-objdump. ``` // Current llvm-objdump -d output aarch64: 20000: bl #0 ppc: 20000: bl .+4 x86: 20000: callq 0 // Ideal output aarch64: 20000: bl 0x20000 ppc: 20000: bl 0x20004 x86: 20000: callq 0x20005 // GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled aarch64: 20000: bl 20000 ppc: 20000: bl 0x20004 x86: 20000: callq 20005 ``` In `lib/Target/X86/X86GenAsmWriter1.inc` (generated by `llvm-tblgen -gen-asm-writer`): ``` case 12: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JCXZ, JECXZ, J... - printPCRelImm(MI, 0, O); + printPCRelImm(MI, Address, 0, O); return; ``` Some targets have 2 `printOperand` overloads, one without `Address` and one with `Address`. They should annotate derived `Operand` properly with `let OperandType = "OPERAND_PCREL"`. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D76574
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@ -58,6 +58,11 @@ protected:
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/// Which style to use for printing hexadecimal values.
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HexStyle::Style PrintHexStyle = HexStyle::C;
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/// If true, a branch immediate (e.g. bl 4) will be printed as a hexadecimal
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/// address (e.g. bl 0x20004). This is useful for a stream disassembler
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/// (llvm-objdump -d).
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bool PrintBranchImmAsAddress = false;
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/// Utility function for printing annotations.
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void printAnnotation(raw_ostream &OS, StringRef Annot);
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@ -100,6 +105,10 @@ public:
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void setPrintHexStyle(HexStyle::Style Value) { PrintHexStyle = Value; }
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void setPrintBranchImmAsAddress(bool Value) {
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PrintBranchImmAsAddress = Value;
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}
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/// Utility function to print immediates in decimal or hex.
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format_object<int64_t> formatImm(int64_t Value) const {
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return PrintImmHex ? formatHex(Value) : formatDec(Value);
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@ -1347,7 +1347,8 @@ void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,
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O << "[" << MI->getOperand(OpNum).getImm() << "]";
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}
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void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, unsigned OpNum,
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void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, uint64_t Address,
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unsigned OpNum,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNum);
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@ -1362,10 +1363,9 @@ void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, unsigned OpNum,
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// If the branch target is simply an address then print it in hex.
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const MCConstantExpr *BranchTarget =
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dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr());
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int64_t Address;
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if (BranchTarget && BranchTarget->evaluateAsAbsolute(Address)) {
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O << "0x";
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O.write_hex(Address);
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int64_t TargetAddress;
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if (BranchTarget && BranchTarget->evaluateAsAbsolute(TargetAddress)) {
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O << formatHex(TargetAddress);
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} else {
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// Otherwise, just print the expression.
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MI->getOperand(OpNum).getExpr()->print(O, &MAI);
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@ -100,7 +100,7 @@ protected:
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printInverseCondCode(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printAlignedLabel(const MCInst *MI, unsigned OpNum,
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void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
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raw_ostream &O);
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@ -115,6 +115,10 @@ private:
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raw_ostream &O);
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void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O) {
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printOperand(MI, OpNum, STI, O);
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}
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void printOperandAndFPInputMods(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printOperandAndIntInputMods(const MCInst *MI, unsigned OpNo,
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@ -36,6 +36,10 @@ public:
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private:
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void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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raw_ostream &O) {
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printOperand(MI, OpNum, O);
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}
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void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O);
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@ -43,6 +43,10 @@ public:
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void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O) {
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printOperand(MI, OpNum, STI, O);
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}
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void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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@ -109,6 +113,12 @@ public:
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template <unsigned scale>
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void printAdrLabelOperand(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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template <unsigned scale>
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void printAdrLabelOperand(const MCInst *MI, uint64_t /*Address*/,
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unsigned OpNum, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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printAdrLabelOperand<scale>(MI, OpNum, STI, O);
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}
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void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printThumbSRImm(const MCInst *MI, unsigned OpNum,
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@ -206,6 +216,11 @@ public:
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printThumbLdrLabelOperand(const MCInst *MI, uint64_t /*Address*/,
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unsigned OpNum, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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printThumbLdrLabelOperand(MI, OpNum, STI, O);
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}
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void printFBits16(const MCInst *MI, unsigned OpNum,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printFBits32(const MCInst *MI, unsigned OpNum,
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@ -38,6 +38,10 @@ private:
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printPCRelImm(const MCInst *MI, uint64_t /*Address*/, unsigned OpNo,
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raw_ostream &O) {
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printPCRelImm(MI, OpNo, O);
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}
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void printMemri(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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// Autogenerated by TableGen.
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@ -92,6 +92,10 @@ public:
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private:
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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raw_ostream &O) {
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printOperand(MI, OpNum, O);
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}
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template <unsigned Bits, unsigned Offset = 0>
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void printUImm(const MCInst *MI, int opNum, raw_ostream &O);
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void printMemOperand(const MCInst *MI, int opNum, raw_ostream &O);
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@ -65,6 +65,10 @@ public:
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void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printImmZeroOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printBranchOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNo,
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raw_ostream &O) {
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printBranchOperand(MI, OpNo, O);
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}
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void printAbsBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printTLSCall(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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@ -155,7 +155,8 @@ void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
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MO.getExpr()->print(O, &MAI);
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}
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void SystemZInstPrinter::printPCRelTLSOperand(const MCInst *MI, int OpNum,
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void SystemZInstPrinter::printPCRelTLSOperand(const MCInst *MI,
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uint64_t Address, int OpNum,
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raw_ostream &O) {
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// Output the PC-relative operand.
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printPCRelOperand(MI, OpNum, O);
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@ -46,6 +46,10 @@ public:
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private:
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// Print various types of operand.
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void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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raw_ostream &O) {
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printOperand(MI, OpNum, O);
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}
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void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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@ -65,7 +69,12 @@ private:
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void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU48ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelTLSOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, uint64_t /*Address*/, int OpNum,
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raw_ostream &O) {
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printPCRelOperand(MI, OpNum, O);
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}
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void printPCRelTLSOperand(const MCInst *MI, uint64_t Address, int OpNum,
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raw_ostream &O);
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// Print the mnemonic for a condition-code mask ("ne", "lh", etc.)
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// This forms part of the instruction name rather than the operand list.
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if (MI->getOpcode() == X86::CALLpcrel32 &&
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(STI.getFeatureBits()[X86::Mode64Bit])) {
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OS << "\tcallq\t";
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printPCRelImm(MI, 0, OS);
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printPCRelImm(MI, Address, 0, OS);
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}
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// data16 and data32 both have the same encoding of 0x66. While data32 is
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// valid only in 16 bit systems, data16 is valid in the rest.
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/// being encoded as a pc-relative value (e.g. for jumps and calls). In
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/// Intel-style these print slightly differently than normal immediates.
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/// for example, a $ is not emitted.
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void X86InstPrinterCommon::printPCRelImm(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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void X86InstPrinterCommon::printPCRelImm(const MCInst *MI, uint64_t Address,
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unsigned OpNo, raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isImm())
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O << formatImm(Op.getImm());
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void printVPCMPMnemonic(const MCInst *MI, raw_ostream &OS);
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void printCMPMnemonic(const MCInst *MI, bool IsVCmp, raw_ostream &OS);
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void printRoundingControl(const MCInst *MI, unsigned Op, raw_ostream &O);
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void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printPCRelImm(const MCInst *MI, uint64_t Address, unsigned OpNo,
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raw_ostream &O);
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protected:
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void printInstFlags(const MCInst *MI, raw_ostream &O);
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void printOptionalSegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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@ -1635,6 +1635,7 @@ static void disassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
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reportError(Obj->getFileName(),
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"no instruction printer for target " + TripleName);
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IP->setPrintImmHex(PrintImmHex);
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IP->setPrintBranchImmAsAddress(true);
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PrettyPrinter &PIP = selectPrettyPrinter(Triple(TripleName));
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SourcePrinter SP(Obj, TheTarget->getName());
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@ -36,6 +36,8 @@ std::string AsmWriterOperand::getCode(bool PassSubtarget) const {
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return Str;
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std::string Result = Str + "(MI";
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if (PCRel)
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Result += ", Address";
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if (MIOpNo != ~0U)
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Result += ", " + utostr(MIOpNo);
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if (PassSubtarget)
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@ -179,7 +181,9 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex,
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CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo];
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unsigned MIOp = OpInfo.MIOperandNo;
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Operands.emplace_back(OpInfo.PrinterMethodName, MIOp, Modifier);
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Operands.emplace_back(OpInfo.PrinterMethodName, MIOp, Modifier,
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AsmWriterOperand::isMachineInstrOperand,
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OpInfo.OperandType == "MCOI::OPERAND_PCREL");
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}
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LastEmitted = VarEnd;
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}
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/// an operand, specified with syntax like ${opname:modifier}.
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std::string MiModifier;
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bool PCRel = false;
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// To make VS STL happy
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AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {}
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@ -55,11 +57,11 @@ namespace llvm {
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OpType op = isLiteralTextOperand)
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: OperandType(op), Str(LitStr) {}
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AsmWriterOperand(const std::string &Printer,
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unsigned _MIOpNo,
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AsmWriterOperand(const std::string &Printer, unsigned _MIOpNo,
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const std::string &Modifier,
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OpType op = isMachineInstrOperand)
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: OperandType(op), MIOpNo(_MIOpNo), Str(Printer), MiModifier(Modifier) {}
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OpType op = isMachineInstrOperand, bool PCRel = false)
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: OperandType(op), MIOpNo(_MIOpNo), Str(Printer), MiModifier(Modifier),
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PCRel(PCRel) {}
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bool operator!=(const AsmWriterOperand &Other) const {
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if (OperandType != Other.OperandType || Str != Other.Str) return true;
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