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[X86] Add full set of patterns for turning ceil/floor/trunc/rint/nearbyint into rndscale with loads, broadcast, and masking.
This amounts to pretty ridiculous number of patterns. Ideally we'd canonicalize the X86ISD::VRNDSCALE earlier to reuse those patterns. I briefly looked into doing that, but some strict FP operations could still get converted to rint and nearbyint during isel. It's probably still worthwhile to look into. This patch is meant as a starting point to work from. llvm-svn: 337234
This commit is contained in:
Craig Topper
parent
160188edeb
commit
7fea031638
@ -10148,188 +10148,207 @@ defm VGETMANTSS: avx512_common_fp_sae_scalar_imm<"vgetmantss", f32x_info,
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0x27, X86GetMants, X86GetMantsRnd, SchedWriteFRnd, HasAVX512>,
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AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<32, CD8VT1>;
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multiclass AVX512_rndscale_lowering<X86VectorVTInfo _, string Suffix> {
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// Register
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def : Pat<(_.VT (ffloor _.RC:$src)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rri")
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_.RC:$src, (i32 0x9))>;
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def : Pat<(_.VT (fnearbyint _.RC:$src)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rri")
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_.RC:$src, (i32 0xC))>;
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def : Pat<(_.VT (fceil _.RC:$src)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rri")
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_.RC:$src, (i32 0xA))>;
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def : Pat<(_.VT (frint _.RC:$src)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rri")
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_.RC:$src, (i32 0x4))>;
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def : Pat<(_.VT (ftrunc _.RC:$src)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rri")
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_.RC:$src, (i32 0xB))>;
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// Merge-masking
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ffloor _.RC:$src), _.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrik")
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_.RC:$dst, _.KRCWM:$mask, _.RC:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fnearbyint _.RC:$src), _.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrik")
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_.RC:$dst, _.KRCWM:$mask, _.RC:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fceil _.RC:$src), _.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrik")
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_.RC:$dst, _.KRCWM:$mask, _.RC:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (frint _.RC:$src), _.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrik")
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_.RC:$dst, _.KRCWM:$mask, _.RC:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ftrunc _.RC:$src), _.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrik")
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_.RC:$dst, _.KRCWM:$mask, _.RC:$src, (i32 0xB))>;
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// Zero-masking
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ffloor _.RC:$src),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrikz")
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_.KRCWM:$mask, _.RC:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fnearbyint _.RC:$src),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrikz")
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_.KRCWM:$mask, _.RC:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fceil _.RC:$src),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrikz")
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_.KRCWM:$mask, _.RC:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (frint _.RC:$src),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrikz")
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_.KRCWM:$mask, _.RC:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ftrunc _.RC:$src),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rrikz")
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_.KRCWM:$mask, _.RC:$src, (i32 0xB))>;
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// Load
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def : Pat<(_.VT (ffloor (_.LdFrag addr:$src))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmi")
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addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (fnearbyint (_.LdFrag addr:$src))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmi")
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addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (fceil (_.LdFrag addr:$src))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmi")
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addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (frint (_.LdFrag addr:$src))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmi")
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addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (ftrunc (_.LdFrag addr:$src))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmi")
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addr:$src, (i32 0xB))>;
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// Merge-masking + load
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ffloor (_.LdFrag addr:$src)),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fnearbyint (_.LdFrag addr:$src)),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fceil (_.LdFrag addr:$src)),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (frint (_.LdFrag addr:$src)),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ftrunc (_.LdFrag addr:$src)),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xB))>;
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// Zero-masking + load
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ffloor (_.LdFrag addr:$src)),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmikz")
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_.KRCWM:$mask, addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fnearbyint (_.LdFrag addr:$src)),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmikz")
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_.KRCWM:$mask, addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (fceil (_.LdFrag addr:$src)),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmikz")
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_.KRCWM:$mask, addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (frint (_.LdFrag addr:$src)),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmikz")
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_.KRCWM:$mask, addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask, (ftrunc (_.LdFrag addr:$src)),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmikz")
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_.KRCWM:$mask, addr:$src, (i32 0xB))>;
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// Broadcast load
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def : Pat<(_.VT (ffloor (X86VBroadcast (_.ScalarLdFrag addr:$src)))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbi")
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addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (fnearbyint (X86VBroadcast (_.ScalarLdFrag addr:$src)))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbi")
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addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (fceil (X86VBroadcast (_.ScalarLdFrag addr:$src)))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbi")
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addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (frint (X86VBroadcast (_.ScalarLdFrag addr:$src)))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbi")
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addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (ftrunc (X86VBroadcast (_.ScalarLdFrag addr:$src)))),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbi")
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addr:$src, (i32 0xB))>;
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// Merge-masking + broadcast load
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(ffloor (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(fnearbyint (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(fceil (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(frint (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(ftrunc (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.RC:$dst)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbik")
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_.RC:$dst, _.KRCWM:$mask, addr:$src, (i32 0xB))>;
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// Zero-masking + broadcast load
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(ffloor (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbikz")
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_.KRCWM:$mask, addr:$src, (i32 0x9))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(fnearbyint (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbikz")
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_.KRCWM:$mask, addr:$src, (i32 0xC))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(fceil (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbikz")
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_.KRCWM:$mask, addr:$src, (i32 0xA))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(frint (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbikz")
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_.KRCWM:$mask, addr:$src, (i32 0x4))>;
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def : Pat<(_.VT (vselect _.KRCWM:$mask,
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(ftrunc (X86VBroadcast (_.ScalarLdFrag addr:$src))),
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_.ImmAllZerosV)),
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(!cast<Instruction>("VRNDSCALE"#Suffix#_.ZSuffix#"rmbikz")
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_.KRCWM:$mask, addr:$src, (i32 0xB))>;
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}
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let Predicates = [HasAVX512] in {
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def : Pat<(v16f32 (ffloor VR512:$src)),
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(VRNDSCALEPSZrri VR512:$src, (i32 0x9))>;
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def : Pat<(v16f32 (vselect VK16WM:$mask, (ffloor VR512:$src), VR512:$dst)),
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(VRNDSCALEPSZrrik VR512:$dst, VK16WM:$mask, VR512:$src, (i32 0x9))>;
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def : Pat<(v16f32 (vselect VK16WM:$mask, (ffloor VR512:$src), v16f32_info.ImmAllZerosV)),
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(VRNDSCALEPSZrrikz VK16WM:$mask, VR512:$src, (i32 0x9))>;
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def : Pat<(v16f32 (fnearbyint VR512:$src)),
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(VRNDSCALEPSZrri VR512:$src, (i32 0xC))>;
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def : Pat<(v16f32 (fceil VR512:$src)),
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(VRNDSCALEPSZrri VR512:$src, (i32 0xA))>;
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def : Pat<(v16f32 (vselect VK16WM:$mask, (fceil VR512:$src), VR512:$dst)),
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(VRNDSCALEPSZrrik VR512:$dst, VK16WM:$mask, VR512:$src, (i32 0xA))>;
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def : Pat<(v16f32 (vselect VK16WM:$mask, (fceil VR512:$src), v16f32_info.ImmAllZerosV)),
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(VRNDSCALEPSZrrikz VK16WM:$mask, VR512:$src, (i32 0xA))>;
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def : Pat<(v16f32 (frint VR512:$src)),
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(VRNDSCALEPSZrri VR512:$src, (i32 0x4))>;
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def : Pat<(v16f32 (ftrunc VR512:$src)),
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(VRNDSCALEPSZrri VR512:$src, (i32 0xB))>;
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def : Pat<(v16f32 (ffloor (loadv16f32 addr:$src))),
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(VRNDSCALEPSZrmi addr:$src, (i32 0x9))>;
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def : Pat<(v16f32 (fnearbyint (loadv16f32 addr:$src))),
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(VRNDSCALEPSZrmi addr:$src, (i32 0xC))>;
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def : Pat<(v16f32 (fceil (loadv16f32 addr:$src))),
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(VRNDSCALEPSZrmi addr:$src, (i32 0xA))>;
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def : Pat<(v16f32 (frint (loadv16f32 addr:$src))),
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(VRNDSCALEPSZrmi addr:$src, (i32 0x4))>;
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def : Pat<(v16f32 (ftrunc (loadv16f32 addr:$src))),
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(VRNDSCALEPSZrmi addr:$src, (i32 0xB))>;
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def : Pat<(v8f64 (ffloor VR512:$src)),
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(VRNDSCALEPDZrri VR512:$src, (i32 0x9))>;
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def : Pat<(v8f64 (vselect VK8WM:$mask, (ffloor VR512:$src), VR512:$dst)),
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(VRNDSCALEPDZrrik VR512:$dst, VK8WM:$mask, VR512:$src, (i32 0x9))>;
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def : Pat<(v8f64 (vselect VK8WM:$mask, (ffloor VR512:$src), v8f64_info.ImmAllZerosV)),
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(VRNDSCALEPDZrrikz VK8WM:$mask, VR512:$src, (i32 0x9))>;
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def : Pat<(v8f64 (fnearbyint VR512:$src)),
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(VRNDSCALEPDZrri VR512:$src, (i32 0xC))>;
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def : Pat<(v8f64 (fceil VR512:$src)),
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(VRNDSCALEPDZrri VR512:$src, (i32 0xA))>;
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def : Pat<(v8f64 (vselect VK8WM:$mask, (fceil VR512:$src), VR512:$dst)),
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(VRNDSCALEPDZrrik VR512:$dst, VK8WM:$mask, VR512:$src, (i32 0xA))>;
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def : Pat<(v8f64 (vselect VK8WM:$mask, (fceil VR512:$src), v8f64_info.ImmAllZerosV)),
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(VRNDSCALEPDZrrikz VK8WM:$mask, VR512:$src, (i32 0xA))>;
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def : Pat<(v8f64 (frint VR512:$src)),
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(VRNDSCALEPDZrri VR512:$src, (i32 0x4))>;
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def : Pat<(v8f64 (ftrunc VR512:$src)),
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(VRNDSCALEPDZrri VR512:$src, (i32 0xB))>;
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def : Pat<(v8f64 (ffloor (loadv8f64 addr:$src))),
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(VRNDSCALEPDZrmi addr:$src, (i32 0x9))>;
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def : Pat<(v8f64 (fnearbyint (loadv8f64 addr:$src))),
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(VRNDSCALEPDZrmi addr:$src, (i32 0xC))>;
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def : Pat<(v8f64 (fceil (loadv8f64 addr:$src))),
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(VRNDSCALEPDZrmi addr:$src, (i32 0xA))>;
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def : Pat<(v8f64 (frint (loadv8f64 addr:$src))),
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(VRNDSCALEPDZrmi addr:$src, (i32 0x4))>;
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def : Pat<(v8f64 (ftrunc (loadv8f64 addr:$src))),
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(VRNDSCALEPDZrmi addr:$src, (i32 0xB))>;
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defm : AVX512_rndscale_lowering<v16f32_info, "PS">;
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defm : AVX512_rndscale_lowering<v8f64_info, "PD">;
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}
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let Predicates = [HasVLX] in {
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def : Pat<(v4f32 (ffloor VR128X:$src)),
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(VRNDSCALEPSZ128rri VR128X:$src, (i32 0x9))>;
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def : Pat<(v4f32 (vselect VK4WM:$mask, (ffloor VR128X:$src), VR128X:$dst)),
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(VRNDSCALEPSZ128rrik VR128X:$dst, VK4WM:$mask, VR128X:$src, (i32 0x9))>;
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def : Pat<(v4f32 (vselect VK4WM:$mask, (ffloor VR128X:$src), v4f32x_info.ImmAllZerosV)),
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(VRNDSCALEPSZ128rrikz VK4WM:$mask, VR128X:$src, (i32 0x9))>;
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def : Pat<(v4f32 (fnearbyint VR128X:$src)),
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(VRNDSCALEPSZ128rri VR128X:$src, (i32 0xC))>;
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def : Pat<(v4f32 (fceil VR128X:$src)),
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(VRNDSCALEPSZ128rri VR128X:$src, (i32 0xA))>;
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def : Pat<(v4f32 (vselect VK4WM:$mask, (fceil VR128X:$src), VR128X:$dst)),
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(VRNDSCALEPSZ128rrik VR128X:$dst, VK4WM:$mask, VR128X:$src, (i32 0xA))>;
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def : Pat<(v4f32 (vselect VK4WM:$mask, (fceil VR128X:$src), v4f32x_info.ImmAllZerosV)),
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(VRNDSCALEPSZ128rrikz VK4WM:$mask, VR128X:$src, (i32 0xA))>;
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def : Pat<(v4f32 (frint VR128X:$src)),
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(VRNDSCALEPSZ128rri VR128X:$src, (i32 0x4))>;
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def : Pat<(v4f32 (ftrunc VR128X:$src)),
|
||||
(VRNDSCALEPSZ128rri VR128X:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v4f32 (ffloor (loadv4f32 addr:$src))),
|
||||
(VRNDSCALEPSZ128rmi addr:$src, (i32 0x9))>;
|
||||
def : Pat<(v4f32 (fnearbyint (loadv4f32 addr:$src))),
|
||||
(VRNDSCALEPSZ128rmi addr:$src, (i32 0xC))>;
|
||||
def : Pat<(v4f32 (fceil (loadv4f32 addr:$src))),
|
||||
(VRNDSCALEPSZ128rmi addr:$src, (i32 0xA))>;
|
||||
def : Pat<(v4f32 (frint (loadv4f32 addr:$src))),
|
||||
(VRNDSCALEPSZ128rmi addr:$src, (i32 0x4))>;
|
||||
def : Pat<(v4f32 (ftrunc (loadv4f32 addr:$src))),
|
||||
(VRNDSCALEPSZ128rmi addr:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v2f64 (ffloor VR128X:$src)),
|
||||
(VRNDSCALEPDZ128rri VR128X:$src, (i32 0x9))>;
|
||||
def : Pat<(v2f64 (vselect VK2WM:$mask, (ffloor VR128X:$src), VR128X:$dst)),
|
||||
(VRNDSCALEPDZ128rrik VR128X:$dst, VK2WM:$mask, VR128X:$src, (i32 0x9))>;
|
||||
def : Pat<(v2f64 (vselect VK2WM:$mask, (ffloor VR128X:$src), v2f64x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPDZ128rrikz VK2WM:$mask, VR128X:$src, (i32 0x9))>;
|
||||
def : Pat<(v2f64 (fnearbyint VR128X:$src)),
|
||||
(VRNDSCALEPDZ128rri VR128X:$src, (i32 0xC))>;
|
||||
def : Pat<(v2f64 (fceil VR128X:$src)),
|
||||
(VRNDSCALEPDZ128rri VR128X:$src, (i32 0xA))>;
|
||||
def : Pat<(v2f64 (vselect VK2WM:$mask, (fceil VR128X:$src), VR128X:$dst)),
|
||||
(VRNDSCALEPDZ128rrik VR128X:$dst, VK2WM:$mask, VR128X:$src, (i32 0xA))>;
|
||||
def : Pat<(v2f64 (vselect VK2WM:$mask, (fceil VR128X:$src), v2f64x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPDZ128rrikz VK2WM:$mask, VR128X:$src, (i32 0xA))>;
|
||||
def : Pat<(v2f64 (frint VR128X:$src)),
|
||||
(VRNDSCALEPDZ128rri VR128X:$src, (i32 0x4))>;
|
||||
def : Pat<(v2f64 (ftrunc VR128X:$src)),
|
||||
(VRNDSCALEPDZ128rri VR128X:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v2f64 (ffloor (loadv2f64 addr:$src))),
|
||||
(VRNDSCALEPDZ128rmi addr:$src, (i32 0x9))>;
|
||||
def : Pat<(v2f64 (fnearbyint (loadv2f64 addr:$src))),
|
||||
(VRNDSCALEPDZ128rmi addr:$src, (i32 0xC))>;
|
||||
def : Pat<(v2f64 (fceil (loadv2f64 addr:$src))),
|
||||
(VRNDSCALEPDZ128rmi addr:$src, (i32 0xA))>;
|
||||
def : Pat<(v2f64 (frint (loadv2f64 addr:$src))),
|
||||
(VRNDSCALEPDZ128rmi addr:$src, (i32 0x4))>;
|
||||
def : Pat<(v2f64 (ftrunc (loadv2f64 addr:$src))),
|
||||
(VRNDSCALEPDZ128rmi addr:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v8f32 (ffloor VR256X:$src)),
|
||||
(VRNDSCALEPSZ256rri VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v8f32 (vselect VK8WM:$mask, (ffloor VR256X:$src), VR256X:$dst)),
|
||||
(VRNDSCALEPSZ256rrik VR256X:$dst, VK8WM:$mask, VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v8f32 (vselect VK8WM:$mask, (ffloor VR256X:$src), v8f32x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPSZ256rrikz VK8WM:$mask, VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v8f32 (fnearbyint VR256X:$src)),
|
||||
(VRNDSCALEPSZ256rri VR256X:$src, (i32 0xC))>;
|
||||
def : Pat<(v8f32 (fceil VR256X:$src)),
|
||||
(VRNDSCALEPSZ256rri VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v8f32 (vselect VK8WM:$mask, (fceil VR256X:$src), VR256X:$dst)),
|
||||
(VRNDSCALEPSZ256rrik VR256X:$dst, VK8WM:$mask, VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v8f32 (vselect VK8WM:$mask, (fceil VR256X:$src), v8f32x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPSZ256rrikz VK8WM:$mask, VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v8f32 (frint VR256X:$src)),
|
||||
(VRNDSCALEPSZ256rri VR256X:$src, (i32 0x4))>;
|
||||
def : Pat<(v8f32 (ftrunc VR256X:$src)),
|
||||
(VRNDSCALEPSZ256rri VR256X:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v8f32 (ffloor (loadv8f32 addr:$src))),
|
||||
(VRNDSCALEPSZ256rmi addr:$src, (i32 0x9))>;
|
||||
def : Pat<(v8f32 (fnearbyint (loadv8f32 addr:$src))),
|
||||
(VRNDSCALEPSZ256rmi addr:$src, (i32 0xC))>;
|
||||
def : Pat<(v8f32 (fceil (loadv8f32 addr:$src))),
|
||||
(VRNDSCALEPSZ256rmi addr:$src, (i32 0xA))>;
|
||||
def : Pat<(v8f32 (frint (loadv8f32 addr:$src))),
|
||||
(VRNDSCALEPSZ256rmi addr:$src, (i32 0x4))>;
|
||||
def : Pat<(v8f32 (ftrunc (loadv8f32 addr:$src))),
|
||||
(VRNDSCALEPSZ256rmi addr:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v4f64 (ffloor VR256X:$src)),
|
||||
(VRNDSCALEPDZ256rri VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v4f64 (vselect VK4WM:$mask, (ffloor VR256X:$src), VR256X:$dst)),
|
||||
(VRNDSCALEPDZ256rrik VR256X:$dst, VK4WM:$mask, VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v4f64 (vselect VK4WM:$mask, (ffloor VR256X:$src), v4f64x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPDZ256rrikz VK4WM:$mask, VR256X:$src, (i32 0x9))>;
|
||||
def : Pat<(v4f64 (fnearbyint VR256X:$src)),
|
||||
(VRNDSCALEPDZ256rri VR256X:$src, (i32 0xC))>;
|
||||
def : Pat<(v4f64 (fceil VR256X:$src)),
|
||||
(VRNDSCALEPDZ256rri VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v4f64 (vselect VK4WM:$mask, (fceil VR256X:$src), VR256X:$dst)),
|
||||
(VRNDSCALEPDZ256rrik VR256X:$dst, VK4WM:$mask, VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v4f64 (vselect VK4WM:$mask, (fceil VR256X:$src), v4f64x_info.ImmAllZerosV)),
|
||||
(VRNDSCALEPDZ256rrikz VK4WM:$mask, VR256X:$src, (i32 0xA))>;
|
||||
def : Pat<(v4f64 (frint VR256X:$src)),
|
||||
(VRNDSCALEPDZ256rri VR256X:$src, (i32 0x4))>;
|
||||
def : Pat<(v4f64 (ftrunc VR256X:$src)),
|
||||
(VRNDSCALEPDZ256rri VR256X:$src, (i32 0xB))>;
|
||||
|
||||
def : Pat<(v4f64 (ffloor (loadv4f64 addr:$src))),
|
||||
(VRNDSCALEPDZ256rmi addr:$src, (i32 0x9))>;
|
||||
def : Pat<(v4f64 (fnearbyint (loadv4f64 addr:$src))),
|
||||
(VRNDSCALEPDZ256rmi addr:$src, (i32 0xC))>;
|
||||
def : Pat<(v4f64 (fceil (loadv4f64 addr:$src))),
|
||||
(VRNDSCALEPDZ256rmi addr:$src, (i32 0xA))>;
|
||||
def : Pat<(v4f64 (frint (loadv4f64 addr:$src))),
|
||||
(VRNDSCALEPDZ256rmi addr:$src, (i32 0x4))>;
|
||||
def : Pat<(v4f64 (ftrunc (loadv4f64 addr:$src))),
|
||||
(VRNDSCALEPDZ256rmi addr:$src, (i32 0xB))>;
|
||||
defm : AVX512_rndscale_lowering<v8f32x_info, "PS">;
|
||||
defm : AVX512_rndscale_lowering<v4f64x_info, "PD">;
|
||||
defm : AVX512_rndscale_lowering<v4f32x_info, "PS">;
|
||||
defm : AVX512_rndscale_lowering<v2f64x_info, "PD">;
|
||||
}
|
||||
|
||||
multiclass avx512_shuff_packed_128_common<bits<8> opc, string OpcodeStr,
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user