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Implement a method for inline asm support
llvm-svn: 25660
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@ -13,7 +13,9 @@
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/ADT/StringExtras.h"
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using namespace llvm;
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TargetLowering::TargetLowering(TargetMachine &tm)
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@ -132,3 +134,18 @@ bool TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op,
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uint64_t Mask) const {
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return false;
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}
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std::vector<unsigned> TargetLowering::
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getRegForInlineAsmConstraint(const std::string &Constraint) const {
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// Scan to see if this constraint is a register name.
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const MRegisterInfo *RI = TM.getRegisterInfo();
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for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) {
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if (const char *Name = RI->get(i).Name)
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if (StringsEqualNoCase(Constraint, Name))
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return std::vector<unsigned>(1, i);
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}
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// Not a physreg, must not be a register reference or something.
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return std::vector<unsigned>();
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}
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