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LiveIntervalAnalysis: Compute subregister ranges.
llvm-svn: 223878
This commit is contained in:
Matthias Braun
parent
40d9c3d4f3
commit
811d864c60
@ -29,14 +29,75 @@ void LiveRangeCalc::reset(const MachineFunction *mf,
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DomTree = MDT;
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Alloc = VNIA;
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unsigned N = MF->getNumBlockIDs();
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Seen.clear();
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Seen.resize(N);
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LiveOut.resize(N);
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MainLiveOutData.reset(MF->getNumBlockIDs());
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LiveIn.clear();
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}
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static SlotIndex getDefIndex(const SlotIndexes &Indexes, const MachineInstr &MI,
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bool EarlyClobber) {
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// PHI defs begin at the basic block start index.
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if (MI.isPHI())
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return Indexes.getMBBStartIdx(MI.getParent());
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// Instructions are either normal 'r', or early clobber 'e'.
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return Indexes.getInstructionIndex(&MI).getRegSlot(EarlyClobber);
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}
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void LiveRangeCalc::createDeadDefs(LiveInterval &LI) {
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assert(MRI && Indexes && "call reset() first");
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// Visit all def operands. If the same instruction has multiple defs of Reg,
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// LR.createDeadDef() will deduplicate.
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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unsigned Reg = LI.reg;
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for (const MachineOperand &MO : MRI->def_operands(Reg)) {
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const MachineInstr *MI = MO.getParent();
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SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
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unsigned SubReg = MO.getSubReg();
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if (SubReg != 0 || LI.hasSubRanges()) {
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unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
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: MRI->getMaxLaneMaskForVReg(Reg);
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// If this is the first time we see a subregister def, initialize
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// subranges by creating a copy of the main range.
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if (!LI.hasSubRanges() && !LI.empty()) {
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unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
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LI.createSubRangeFrom(*Alloc, ClassMask, LI);
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}
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for (LiveInterval::subrange_iterator S = LI.subrange_begin(),
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SE = LI.subrange_end(); S != SE; ++S) {
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// A Mask for subregs common to the existing subrange and current def.
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unsigned Common = S->LaneMask & Mask;
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if (Common == 0)
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continue;
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// A Mask for subregs covered by the subrange but not the current def.
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unsigned LRest = S->LaneMask & ~Mask;
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LiveInterval::SubRange *CommonRange;
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if (LRest != 0) {
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// Split current subrange into Common and LRest ranges.
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S->LaneMask = LRest;
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CommonRange = LI.createSubRangeFrom(*Alloc, Common, *S);
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} else {
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assert(Common == S->LaneMask);
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CommonRange = &*S;
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}
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CommonRange->createDeadDef(Idx, *Alloc);
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Mask &= ~Common;
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}
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if (Mask != 0) {
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LiveInterval::SubRange *SubRange = LI.createSubRange(*Alloc, Mask);
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SubRange->createDeadDef(Idx, *Alloc);
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}
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}
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// Create the def in LR. This may find an existing def.
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LI.createDeadDef(Idx, *Alloc);
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}
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}
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void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
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assert(MRI && Indexes && "call reset() first");
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@ -44,22 +105,38 @@ void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
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// LR.createDeadDef() will deduplicate.
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for (MachineOperand &MO : MRI->def_operands(Reg)) {
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const MachineInstr *MI = MO.getParent();
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// Find the corresponding slot index.
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SlotIndex Idx;
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if (MI->isPHI())
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// PHI defs begin at the basic block start index.
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Idx = Indexes->getMBBStartIdx(MI->getParent());
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else
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// Instructions are either normal 'r', or early clobber 'e'.
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Idx = Indexes->getInstructionIndex(MI)
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.getRegSlot(MO.isEarlyClobber());
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SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
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// Create the def in LR. This may find an existing def.
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LR.createDeadDef(Idx, *Alloc);
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}
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}
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static SlotIndex getUseIndex(const SlotIndexes &Indexes,
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const MachineOperand &MO) {
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const MachineInstr *MI = MO.getParent();
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unsigned OpNo = (&MO - &MI->getOperand(0));
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if (MI->isPHI()) {
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assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
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// The actual place where a phi operand is used is the end of the pred MBB.
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// PHI operands are paired: (Reg, PredMBB).
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return Indexes.getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
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}
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// Check for early-clobber redefs.
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bool isEarlyClobber = false;
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unsigned DefIdx;
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if (MO.isDef()) {
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isEarlyClobber = MO.isEarlyClobber();
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} else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
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// FIXME: This would be a lot easier if tied early-clobber uses also
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// had an early-clobber flag.
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isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
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}
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return Indexes.getInstructionIndex(MI).getRegSlot(isEarlyClobber);
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}
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void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) {
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assert(MRI && Indexes && "call reset() first");
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@ -73,38 +150,86 @@ void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) {
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continue;
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// MI is reading Reg. We may have visited MI before if it happens to be
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// reading Reg multiple times. That is OK, extend() is idempotent.
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const MachineInstr *MI = MO.getParent();
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unsigned OpNo = (&MO - &MI->getOperand(0));
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// Find the SlotIndex being read.
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SlotIndex Idx;
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if (MI->isPHI()) {
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assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
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// PHI operands are paired: (Reg, PredMBB).
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// Extend the live range to be live-out from PredMBB.
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Idx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
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} else {
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// This is a normal instruction.
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Idx = Indexes->getInstructionIndex(MI).getRegSlot();
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// Check for early-clobber redefs.
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unsigned DefIdx;
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if (MO.isDef()) {
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if (MO.isEarlyClobber())
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Idx = Idx.getRegSlot(true);
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} else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
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// FIXME: This would be a lot easier if tied early-clobber uses also
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// had an early-clobber flag.
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if (MI->getOperand(DefIdx).isEarlyClobber())
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Idx = Idx.getRegSlot(true);
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}
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}
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extend(LR, Idx, Reg);
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SlotIndex Idx = getUseIndex(*Indexes, MO);
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extend(LR, Idx, Reg, MainLiveOutData);
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}
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}
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// Transfer information from the LiveIn vector to the live ranges.
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void LiveRangeCalc::updateLiveIns() {
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void LiveRangeCalc::extendToUses(LiveInterval &LI) {
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assert(MRI && Indexes && "call reset() first");
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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SmallVector<LiveOutData,2> LiveOuts;
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unsigned NumSubRanges = 0;
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for (LiveInterval::subrange_iterator S = LI.subrange_begin(),
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SE = LI.subrange_end(); S != SE; ++S, ++NumSubRanges) {
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LiveOuts.push_back(LiveOutData());
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LiveOuts.back().reset(MF->getNumBlockIDs());
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}
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// Visit all operands that read Reg. This may include partial defs.
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unsigned Reg = LI.reg;
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for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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// Clear all kill flags. They will be reinserted after register allocation
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// by LiveIntervalAnalysis::addKillFlags().
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if (MO.isUse())
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MO.setIsKill(false);
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if (!MO.readsReg())
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continue;
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SlotIndex Idx = getUseIndex(*Indexes, MO);
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unsigned SubReg = MO.getSubReg();
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if (MO.isUse() && (LI.hasSubRanges() || SubReg != 0)) {
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unsigned Mask = SubReg != 0
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? TRI.getSubRegIndexLaneMask(SubReg)
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: Mask = MRI->getMaxLaneMaskForVReg(Reg);
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// If this is the first time we see a subregister def/use. Initialize
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// subranges by creating a copy of the main range.
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if (!LI.hasSubRanges()) {
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unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
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LI.createSubRangeFrom(*Alloc, ClassMask, LI);
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LiveOuts.insert(LiveOuts.begin(), LiveOutData());
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LiveOuts.front().reset(MF->getNumBlockIDs());
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++NumSubRanges;
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}
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unsigned SubRangeIdx = 0;
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for (LiveInterval::subrange_iterator S = LI.subrange_begin(),
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SE = LI.subrange_end(); S != SE; ++S, ++SubRangeIdx) {
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// A Mask for subregs common to the existing subrange and current def.
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unsigned Common = S->LaneMask & Mask;
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if (Common == 0)
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continue;
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// A Mask for subregs covered by the subrange but not the current def.
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unsigned LRest = S->LaneMask & ~Mask;
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LiveInterval::SubRange *CommonRange;
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unsigned CommonRangeIdx;
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if (LRest != 0) {
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// Split current subrange into Common and LRest ranges.
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S->LaneMask = LRest;
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CommonRange = LI.createSubRangeFrom(*Alloc, Common, *S);
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CommonRangeIdx = 0;
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LiveOuts.insert(LiveOuts.begin(), LiveOutData());
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LiveOuts.front().reset(MF->getNumBlockIDs());
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++NumSubRanges;
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++SubRangeIdx;
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} else {
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// The subrange and current def lanemasks match completely.
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assert(Common == S->LaneMask);
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CommonRange = &*S;
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CommonRangeIdx = SubRangeIdx;
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}
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extend(*CommonRange, Idx, Reg, LiveOuts[CommonRangeIdx]);
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Mask &= ~Common;
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}
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assert(SubRangeIdx == NumSubRanges);
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}
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extend(LI, Idx, Reg, MainLiveOutData);
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}
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}
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void LiveRangeCalc::updateFromLiveIns(LiveOutData &LiveOuts) {
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LiveRangeUpdater Updater;
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for (SmallVectorImpl<LiveInBlock>::iterator I = LiveIn.begin(),
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E = LiveIn.end(); I != E; ++I) {
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@ -121,8 +246,8 @@ void LiveRangeCalc::updateLiveIns() {
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else {
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// The value is live-through, update LiveOut as well.
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// Defer the Domtree lookup until it is needed.
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assert(Seen.test(MBB->getNumber()));
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LiveOut[MBB] = LiveOutPair(I->Value, (MachineDomTreeNode *)nullptr);
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assert(LiveOuts.Seen.test(MBB->getNumber()));
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LiveOuts.Map[MBB] = LiveOutPair(I->Value, nullptr);
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}
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Updater.setDest(&I->LR);
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Updater.add(Start, End, I->Value);
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@ -131,7 +256,8 @@ void LiveRangeCalc::updateLiveIns() {
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}
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void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
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void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
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LiveOutData &LiveOuts) {
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assert(Kill.isValid() && "Invalid SlotIndex");
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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@ -147,27 +273,28 @@ void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
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// multiple values, and we may need to create even more phi-defs to preserve
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// VNInfo SSA form. Perform a search for all predecessor blocks where we
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// know the dominating VNInfo.
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if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
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if (findReachingDefs(LR, *KillMBB, Kill, PhysReg, LiveOuts))
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return;
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// When there were multiple different values, we may need new PHIs.
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calculateValues();
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calculateValues(LiveOuts);
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}
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// This function is called by a client after using the low-level API to add
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// live-out and live-in blocks. The unique value optimization is not
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// available, SplitEditor::transferValues handles that case directly anyway.
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void LiveRangeCalc::calculateValues() {
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void LiveRangeCalc::calculateValues(LiveOutData &LiveOuts) {
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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updateSSA();
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updateLiveIns();
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updateSSA(LiveOuts);
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updateFromLiveIns(LiveOuts);
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}
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bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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SlotIndex Kill, unsigned PhysReg) {
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SlotIndex Kill, unsigned PhysReg,
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LiveOutData &LiveOuts) {
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unsigned KillMBBNum = KillMBB.getNumber();
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// Block numbers where LR should be live-in.
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@ -201,8 +328,8 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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MachineBasicBlock *Pred = *PI;
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// Is this a known live-out block?
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if (Seen.test(Pred->getNumber())) {
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if (VNInfo *VNI = LiveOut[Pred].first) {
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if (LiveOuts.Seen.test(Pred->getNumber())) {
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if (VNInfo *VNI = LiveOuts.Map[Pred].first) {
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if (TheVNI && TheVNI != VNI)
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UniqueVNI = false;
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TheVNI = VNI;
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@ -216,7 +343,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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// First time we see Pred. Try to determine the live-out value, but set
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// it as null if Pred is live-through with an unknown value.
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VNInfo *VNI = LR.extendInBlock(Start, End);
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setLiveOutValue(Pred, VNI);
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LiveOuts.setLiveOutValue(Pred, VNI);
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if (VNI) {
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if (TheVNI && TheVNI != VNI)
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UniqueVNI = false;
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@ -251,7 +378,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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if (*I == KillMBBNum && Kill.isValid())
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End = Kill;
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else
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LiveOut[MF->getBlockNumbered(*I)] =
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LiveOuts.Map[MF->getBlockNumbered(*I)] =
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LiveOutPair(TheVNI, nullptr);
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Updater.add(Start, End, TheVNI);
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}
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@ -275,7 +402,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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// This is essentially the same iterative algorithm that SSAUpdater uses,
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// except we already have a dominator tree, so we don't have to recompute it.
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void LiveRangeCalc::updateSSA() {
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void LiveRangeCalc::updateSSA(LiveOutData &LiveOuts) {
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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@ -297,22 +424,23 @@ void LiveRangeCalc::updateSSA() {
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// We need a live-in value to a block with no immediate dominator?
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// This is probably an unreachable block that has survived somehow.
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bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
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bool needPHI = !IDom
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|| !LiveOuts.Seen.test(IDom->getBlock()->getNumber());
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// IDom dominates all of our predecessors, but it may not be their
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// immediate dominator. Check if any of them have live-out values that are
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// properly dominated by IDom. If so, we need a phi-def here.
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if (!needPHI) {
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IDomValue = LiveOut[IDom->getBlock()];
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IDomValue = LiveOuts.Map[IDom->getBlock()];
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// Cache the DomTree node that defined the value.
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if (IDomValue.first && !IDomValue.second)
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LiveOut[IDom->getBlock()].second = IDomValue.second =
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LiveOuts.Map[IDom->getBlock()].second = IDomValue.second =
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DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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LiveOutPair &Value = LiveOut[*PI];
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LiveOutPair &Value = LiveOuts.Map[*PI];
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if (!Value.first || Value.first == IDomValue.first)
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continue;
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@ -334,7 +462,7 @@ void LiveRangeCalc::updateSSA() {
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// The value may be live-through even if Kill is set, as can happen when
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// we are called from extendRange. In that case LiveOutSeen is true, and
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// LiveOut indicates a foreign or missing value.
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LiveOutPair &LOP = LiveOut[MBB];
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LiveOutPair &LOP = LiveOuts.Map[MBB];
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// Create a phi-def if required.
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if (needPHI) {
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@ -348,7 +476,7 @@ void LiveRangeCalc::updateSSA() {
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// This block is done, we know the final value.
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I->DomNode = nullptr;
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// Add liveness since updateLiveIns now skips this node.
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// Add liveness since updateFromLiveIns now skips this node.
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if (I->Kill.isValid())
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LR.addSegment(LiveInterval::Segment(Start, I->Kill, VNI));
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else {
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@ -40,12 +40,6 @@ class LiveRangeCalc {
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MachineDominatorTree *DomTree;
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VNInfo::Allocator *Alloc;
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/// Seen - Bit vector of active entries in LiveOut, also used as a visited
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/// set by findReachingDefs. One entry per basic block, indexed by block
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/// number. This is kept as a separate bit vector because it can be cleared
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/// quickly when switching live ranges.
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BitVector Seen;
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/// LiveOutPair - A value and the block that defined it. The domtree node is
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/// redundant, it can be computed as: MDT[Indexes.getMBBFromIndex(VNI->def)].
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typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
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@ -53,24 +47,44 @@ class LiveRangeCalc {
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/// LiveOutMap - Map basic blocks to the value leaving the block.
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typedef IndexedMap<LiveOutPair, MBB2NumberFunctor> LiveOutMap;
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/// LiveOut - Map each basic block where a live range is live out to the
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/// live-out value and its defining block.
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///
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/// For every basic block, MBB, one of these conditions shall be true:
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///
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/// 1. !Seen.count(MBB->getNumber())
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/// Blocks without a Seen bit are ignored.
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/// 2. LiveOut[MBB].second.getNode() == MBB
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/// The live-out value is defined in MBB.
|
||||
/// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
|
||||
/// The live-out value passses through MBB. All predecessors must carry
|
||||
/// the same value.
|
||||
///
|
||||
/// The domtree node may be null, it can be computed.
|
||||
///
|
||||
/// The map can be shared by multiple live ranges as long as no two are
|
||||
/// live-out of the same block.
|
||||
LiveOutMap LiveOut;
|
||||
struct LiveOutData {
|
||||
/// Seen - Bit vector of active entries in LiveOut, also used as a visited
|
||||
/// set by findReachingDefs. One entry per basic block, indexed by block
|
||||
/// number. This is kept as a separate bit vector because it can be cleared
|
||||
/// quickly when switching live ranges.
|
||||
BitVector Seen;
|
||||
|
||||
/// LiveOut - Map each basic block where a live range is live out to the
|
||||
/// live-out value and its defining block.
|
||||
///
|
||||
/// For every basic block, MBB, one of these conditions shall be true:
|
||||
///
|
||||
/// 1. !Seen.count(MBB->getNumber())
|
||||
/// Blocks without a Seen bit are ignored.
|
||||
/// 2. LiveOut[MBB].second.getNode() == MBB
|
||||
/// The live-out value is defined in MBB.
|
||||
/// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
|
||||
/// The live-out value passses through MBB. All predecessors must carry
|
||||
/// the same value.
|
||||
///
|
||||
/// The domtree node may be null, it can be computed.
|
||||
///
|
||||
/// The map can be shared by multiple live ranges as long as no two are
|
||||
/// live-out of the same block.
|
||||
LiveOutMap Map;
|
||||
|
||||
void reset(unsigned NumBlocks) {
|
||||
Seen.clear();
|
||||
Seen.resize(NumBlocks);
|
||||
Map.resize(NumBlocks);
|
||||
}
|
||||
|
||||
void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) {
|
||||
Seen.set(MBB->getNumber());
|
||||
Map[MBB] = LiveOutPair(VNI, nullptr);
|
||||
}
|
||||
};
|
||||
LiveOutData MainLiveOutData;
|
||||
|
||||
/// LiveInBlock - Information about a basic block where a live range is known
|
||||
/// to be live-in, but the value has not yet been determined.
|
||||
@ -112,17 +126,19 @@ class LiveRangeCalc {
|
||||
///
|
||||
/// PhysReg, when set, is used to verify live-in lists on basic blocks.
|
||||
bool findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
|
||||
SlotIndex Kill, unsigned PhysReg);
|
||||
SlotIndex Kill, unsigned PhysReg,
|
||||
LiveOutData &LiveOuts);
|
||||
|
||||
/// updateSSA - Compute the values that will be live in to all requested
|
||||
/// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
|
||||
///
|
||||
/// Every live-in block must be jointly dominated by the added live-out
|
||||
/// blocks. No values are read from the live ranges.
|
||||
void updateSSA();
|
||||
void updateSSA(LiveOutData &LiveOuts);
|
||||
|
||||
/// Add liveness as specified in the LiveIn vector.
|
||||
void updateLiveIns();
|
||||
/// Transfer information from the LiveIn vector to the live ranges and update
|
||||
/// the given @p LiveOuts.
|
||||
void updateFromLiveIns(LiveOutData &LiveOuts);
|
||||
|
||||
public:
|
||||
LiveRangeCalc() : MF(nullptr), MRI(nullptr), Indexes(nullptr),
|
||||
@ -160,17 +176,25 @@ public:
|
||||
/// single existing value, Alloc may be null.
|
||||
///
|
||||
/// PhysReg, when set, is used to verify live-in lists on basic blocks.
|
||||
void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg = 0);
|
||||
void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
|
||||
LiveOutData &LiveOuts);
|
||||
|
||||
void extend(LiveRange &LR, SlotIndex Kill) {
|
||||
extend(LR, Kill, 0, MainLiveOutData);
|
||||
}
|
||||
|
||||
/// createDeadDefs - Create a dead def in LI for every def operand of Reg.
|
||||
/// Each instruction defining Reg gets a new VNInfo with a corresponding
|
||||
/// minimal live range.
|
||||
void createDeadDefs(LiveRange &LR, unsigned Reg);
|
||||
|
||||
/// createDeadDefs - Create a dead def in LI for every def of LI->reg.
|
||||
void createDeadDefs(LiveInterval &LI) {
|
||||
createDeadDefs(LI, LI.reg);
|
||||
}
|
||||
/// Subregister aware version of createDeadDefs(LiveRange &LR, unsigned Reg).
|
||||
/// If subregister liveness tracking is enabled new subranges are created as
|
||||
/// necessary when subregister defs are found. As with
|
||||
/// createDeadDefs(LiveRange &LR, unsigned Reg) new short live segments are
|
||||
/// created for every def of LI.reg. The new segments start and end at the
|
||||
/// defining instruction (hence the name "DeadDef").
|
||||
void createDeadDefs(LiveInterval &LI);
|
||||
|
||||
/// extendToUses - Extend the live range of LI to reach all uses of Reg.
|
||||
///
|
||||
@ -178,10 +202,13 @@ public:
|
||||
/// inserted as needed to preserve SSA form.
|
||||
void extendToUses(LiveRange &LR, unsigned Reg);
|
||||
|
||||
/// extendToUses - Extend the live range of LI to reach all uses of LI->reg.
|
||||
void extendToUses(LiveInterval &LI) {
|
||||
extendToUses(LI, LI.reg);
|
||||
}
|
||||
/// Subregister aware version of extendToUses(LiveRange &LR, unsigned Reg).
|
||||
/// If subregister liveness tracking is enabled new subranges are created
|
||||
/// as necessary when subregister uses are found. As with
|
||||
/// extendToUses(LiveRange &LR, unsigned Reg) the segments existing at the
|
||||
/// defs are extend until they reach all uses. New value numbers are created
|
||||
/// at CFG joins as necessary (SSA construction).
|
||||
void extendToUses(LiveInterval &LI);
|
||||
|
||||
//===--------------------------------------------------------------------===//
|
||||
// Low-level interface.
|
||||
@ -203,8 +230,7 @@ public:
|
||||
/// VNI may be null only if MBB is a live-through block also passed to
|
||||
/// addLiveInBlock().
|
||||
void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) {
|
||||
Seen.set(MBB->getNumber());
|
||||
LiveOut[MBB] = LiveOutPair(VNI, nullptr);
|
||||
MainLiveOutData.setLiveOutValue(MBB, VNI);
|
||||
}
|
||||
|
||||
/// addLiveInBlock - Add a block with an unknown live-in value. This
|
||||
@ -229,7 +255,11 @@ public:
|
||||
///
|
||||
/// Every predecessor of a live-in block must have been given a value with
|
||||
/// setLiveOutValue, the value may be null for live-trough blocks.
|
||||
void calculateValues();
|
||||
void calculateValues(LiveOutData &LiveOuts);
|
||||
|
||||
void calculateValues() {
|
||||
calculateValues(MainLiveOutData);
|
||||
}
|
||||
};
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
Loading…
Reference in New Issue
Block a user