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[MC] Fix Intel Operand assembly parsing for .set ids
Recommitting after fixing overaggressive fastpath return in parsing. Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Associated commit to fix clang test commited shortly. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 277489
This commit is contained in:
Nirav Dave
parent
0da07e34bd
commit
8168491a41
@ -698,14 +698,11 @@ private:
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std::unique_ptr<X86Operand> ParseIntelOperator(unsigned OpKind);
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std::unique_ptr<X86Operand>
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ParseIntelSegmentOverride(unsigned SegReg, SMLoc Start, unsigned Size);
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std::unique_ptr<X86Operand>
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ParseIntelMemOperand(int64_t ImmDisp, SMLoc StartLoc, unsigned Size);
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std::unique_ptr<X86Operand> ParseRoundingModeOp(SMLoc Start, SMLoc End);
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bool ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End);
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std::unique_ptr<X86Operand> ParseIntelBracExpression(unsigned SegReg,
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SMLoc Start,
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int64_t ImmDisp,
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unsigned Size);
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std::unique_ptr<X86Operand>
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ParseIntelBracExpression(unsigned SegReg, SMLoc Start, int64_t ImmDisp,
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bool isSymbol, unsigned Size);
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bool ParseIntelIdentifier(const MCExpr *&Val, StringRef &Identifier,
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InlineAsmIdentifierInfo &Info,
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bool IsUnevaluatedOperand, SMLoc &End);
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@ -1271,7 +1268,7 @@ bool X86AsmParser::ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End) {
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// The period in the dot operator (e.g., [ebx].foo.bar) is parsed as an
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// identifier. Don't try an parse it as a register.
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if (Tok.getString().startswith("."))
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if (PrevTK != AsmToken::Error && Tok.getString().startswith("."))
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break;
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// If we're parsing an immediate expression, we don't expect a '['.
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@ -1386,7 +1383,8 @@ bool X86AsmParser::ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End) {
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std::unique_ptr<X86Operand>
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X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
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int64_t ImmDisp, unsigned Size) {
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int64_t ImmDisp, bool isSymbol,
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unsigned Size) {
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MCAsmParser &Parser = getParser();
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const AsmToken &Tok = Parser.getTok();
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SMLoc BracLoc = Tok.getLoc(), End = Tok.getEndLoc();
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@ -1436,6 +1434,21 @@ X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
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Disp = NewDisp;
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}
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if (isSymbol) {
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if (SM.getSym()) {
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Error(Start, "cannot use more than one symbol in memory operand");
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return nullptr;
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}
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if (SM.getBaseReg()) {
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Error(Start, "cannot use base register with variable reference");
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return nullptr;
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}
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if (SM.getIndexReg()) {
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Error(Start, "cannot use index register with variable reference");
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return nullptr;
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}
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}
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int BaseReg = SM.getBaseReg();
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int IndexReg = SM.getIndexReg();
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int Scale = SM.getScale();
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@ -1541,7 +1554,7 @@ X86AsmParser::ParseIntelSegmentOverride(unsigned SegReg, SMLoc Start,
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}
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if (getLexer().is(AsmToken::LBrac))
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return ParseIntelBracExpression(SegReg, Start, ImmDisp, Size);
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return ParseIntelBracExpression(SegReg, Start, ImmDisp, false, Size);
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const MCExpr *Val;
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SMLoc End;
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@ -1598,66 +1611,6 @@ X86AsmParser::ParseRoundingModeOp(SMLoc Start, SMLoc End) {
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}
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return ErrorOperand(Tok.getLoc(), "unknown token in expression");
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}
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/// ParseIntelMemOperand - Parse intel style memory operand.
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std::unique_ptr<X86Operand> X86AsmParser::ParseIntelMemOperand(int64_t ImmDisp,
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SMLoc Start,
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unsigned Size) {
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MCAsmParser &Parser = getParser();
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const AsmToken &Tok = Parser.getTok();
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SMLoc End;
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// Parse ImmDisp [ BaseReg + Scale*IndexReg + Disp ].
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if (getLexer().is(AsmToken::LBrac))
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return ParseIntelBracExpression(/*SegReg=*/0, Start, ImmDisp, Size);
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assert(ImmDisp == 0);
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const MCExpr *Val;
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if (!isParsingInlineAsm()) {
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if (getParser().parsePrimaryExpr(Val, End))
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return ErrorOperand(Tok.getLoc(), "unknown token in expression");
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return X86Operand::CreateMem(getPointerWidth(), Val, Start, End, Size);
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}
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InlineAsmIdentifierInfo Info;
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StringRef Identifier = Tok.getString();
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if (ParseIntelIdentifier(Val, Identifier, Info,
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/*Unevaluated=*/false, End))
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return nullptr;
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if (!getLexer().is(AsmToken::LBrac))
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return CreateMemForInlineAsm(/*SegReg=*/0, Val, /*BaseReg=*/0, /*IndexReg=*/0,
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/*Scale=*/1, Start, End, Size, Identifier, Info);
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Parser.Lex(); // Eat '['
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// Parse Identifier [ ImmDisp ]
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IntelExprStateMachine SM(/*ImmDisp=*/0, /*StopOnLBrac=*/true,
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/*AddImmPrefix=*/false);
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if (ParseIntelExpression(SM, End))
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return nullptr;
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if (SM.getSym()) {
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Error(Start, "cannot use more than one symbol in memory operand");
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return nullptr;
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}
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if (SM.getBaseReg()) {
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Error(Start, "cannot use base register with variable reference");
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return nullptr;
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}
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if (SM.getIndexReg()) {
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Error(Start, "cannot use index register with variable reference");
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return nullptr;
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}
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const MCExpr *Disp = MCConstantExpr::create(SM.getImm(), getContext());
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// BaseReg is non-zero to avoid assertions. In the context of inline asm,
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// we're pointing to a local variable in memory, so the base register is
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// really the frame or stack pointer.
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return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp,
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/*BaseReg=*/1, /*IndexReg=*/0, /*Scale=*/1,
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Start, End, Size, Identifier, Info.OpDecl);
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}
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/// Parse the '.' operator.
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bool X86AsmParser::ParseIntelDotOperator(const MCExpr *Disp,
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@ -1804,50 +1757,9 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
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Parser.Lex(); // Eat ptr.
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PtrInOperand = true;
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}
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Start = Tok.getLoc();
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// Immediate.
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if (getLexer().is(AsmToken::Integer) || getLexer().is(AsmToken::Minus) ||
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getLexer().is(AsmToken::Tilde) || getLexer().is(AsmToken::LParen)) {
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AsmToken StartTok = Tok;
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IntelExprStateMachine SM(/*Imm=*/0, /*StopOnLBrac=*/true,
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/*AddImmPrefix=*/false);
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if (ParseIntelExpression(SM, End))
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return nullptr;
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int64_t Imm = SM.getImm();
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if (isParsingInlineAsm()) {
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unsigned Len = Tok.getLoc().getPointer() - Start.getPointer();
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if (StartTok.getString().size() == Len)
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// Just add a prefix if this wasn't a complex immediate expression.
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InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, Start);
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else
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// Otherwise, rewrite the complex expression as a single immediate.
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InstInfo->AsmRewrites->emplace_back(AOK_Imm, Start, Len, Imm);
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}
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if (getLexer().isNot(AsmToken::LBrac)) {
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// If a directional label (ie. 1f or 2b) was parsed above from
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// ParseIntelExpression() then SM.getSym() was set to a pointer to
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// to the MCExpr with the directional local symbol and this is a
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// memory operand not an immediate operand.
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if (SM.getSym())
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return X86Operand::CreateMem(getPointerWidth(), SM.getSym(), Start, End,
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Size);
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const MCExpr *ImmExpr = MCConstantExpr::create(Imm, getContext());
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return X86Operand::CreateImm(ImmExpr, Start, End);
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}
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// Only positive immediates are valid.
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if (Imm < 0)
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return ErrorOperand(Start, "expected a positive immediate displacement "
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"before bracketed expr.");
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// Parse ImmDisp [ BaseReg + Scale*IndexReg + Disp ].
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return ParseIntelMemOperand(Imm, Start, Size);
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}
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// rounding mode token
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if (getSTI().getFeatureBits()[X86::FeatureAVX512] &&
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getLexer().is(AsmToken::LCurly))
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@ -1855,7 +1767,8 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
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// Register.
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unsigned RegNo = 0;
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if (!ParseRegister(RegNo, Start, End)) {
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if (getLexer().is(AsmToken::Identifier) &&
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!ParseRegister(RegNo, Start, End)) {
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// If this is a segment register followed by a ':', then this is the start
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// of a segment override, otherwise this is a normal register reference.
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// In case it is a normal register and there is ptr in the operand this
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@ -1867,12 +1780,63 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
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}
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return X86Operand::CreateReg(RegNo, Start, End);
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}
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return ParseIntelSegmentOverride(/*SegReg=*/RegNo, Start, Size);
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}
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// Memory operand.
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return ParseIntelMemOperand(/*Disp=*/0, Start, Size);
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// Immediates and Memory
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// Parse [ BaseReg + Scale*IndexReg + Disp ].
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if (getLexer().is(AsmToken::LBrac))
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return ParseIntelBracExpression(/*SegReg=*/0, Start, /*ImmDisp=*/0, false,
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Size);
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AsmToken StartTok = Tok;
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IntelExprStateMachine SM(/*Imm=*/0, /*StopOnLBrac=*/true,
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/*AddImmPrefix=*/false);
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if (ParseIntelExpression(SM, End))
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return nullptr;
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bool isSymbol = SM.getSym() && SM.getSym()->getKind() != MCExpr::Constant;
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int64_t Imm = SM.getImm();
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if (SM.getSym() && SM.getSym()->getKind() == MCExpr::Constant)
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SM.getSym()->evaluateAsAbsolute(Imm);
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if (StartTok.isNot(AsmToken::Identifier) &&
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StartTok.isNot(AsmToken::String) && isParsingInlineAsm()) {
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unsigned Len = Tok.getLoc().getPointer() - Start.getPointer();
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if (StartTok.getString().size() == Len)
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// Just add a prefix if this wasn't a complex immediate expression.
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InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, Start);
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else
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// Otherwise, rewrite the complex expression as a single immediate.
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InstInfo->AsmRewrites->emplace_back(AOK_Imm, Start, Len, Imm);
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}
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if (getLexer().isNot(AsmToken::LBrac)) {
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// If a directional label (ie. 1f or 2b) was parsed above from
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// ParseIntelExpression() then SM.getSym() was set to a pointer to
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// to the MCExpr with the directional local symbol and this is a
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// memory operand not an immediate operand.
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if (isSymbol) {
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if (isParsingInlineAsm())
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return CreateMemForInlineAsm(/*SegReg=*/0, SM.getSym(), /*BaseReg=*/0,
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/*IndexReg=*/0,
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/*Scale=*/1, Start, End, Size,
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SM.getSymName(), SM.getIdentifierInfo());
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return X86Operand::CreateMem(getPointerWidth(), SM.getSym(), Start, End,
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Size);
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}
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const MCExpr *ImmExpr = MCConstantExpr::create(Imm, getContext());
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return X86Operand::CreateImm(ImmExpr, Start, End);
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}
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// Only positive immediates are valid.
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if (Imm < 0)
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return ErrorOperand(Start, "expected a positive immediate displacement "
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"before bracketed expr.");
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return ParseIntelBracExpression(/*SegReg=*/0, Start, Imm, isSymbol, Size);
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}
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std::unique_ptr<X86Operand> X86AsmParser::ParseATTOperand() {
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@ -1916,7 +1880,7 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseATTOperand() {
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SMLoc Start = Parser.getTok().getLoc(), End;
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if (getSTI().getFeatureBits()[X86::FeatureAVX512])
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return ParseRoundingModeOp(Start, End);
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return ErrorOperand(Start, "unknown token in expression");
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return ErrorOperand(Start, "Unexpected '{' in expression");
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}
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}
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}
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@ -76,3 +76,8 @@ LBB0_3:
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// CHECK: encoding: [0xca,0x08,0x00]
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retf 8
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.set FOO, 2
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cmp eax, FOO
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// CHECK: encoding: [0x83,0xf8,0x02]
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cmp eax, FOO[eax]
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// CHECK: encoding: [0x67,0x3b,0x40,0x02]
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@ -11,3 +11,16 @@ _test2:
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.att_syntax noprefix
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// CHECK: error: '.att_syntax noprefix' is not supported: registers must have a '%' prefix in .att_syntax
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movl $257, -4(esp)
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.intel_syntax noprefix
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.global arr
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.global i
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.set FOO, 2
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//CHECK-STDERR: error: cannot use base register with variable reference
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mov eax, DWORD PTR arr[ebp + 1 + (2 * 5) - 3 + 1<<1]
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//CHECK-STDERR: error: cannot use index register with variable reference
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mov eax, DWORD PTR arr[esi*4]
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//CHECK-STDERR: error: cannot use more than one symbol in memory operand
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mov eax, DWORD PTR arr[i]
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