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TargetMachine: Move lib/CodeGen specific callbacks to LLVMTargetMachine; NFC
llvm-svn: 346184
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bd8238f4c6
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81989e4ac5
@ -284,18 +284,6 @@ public:
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void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
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Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
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MCSymbol *getSymbol(const GlobalValue *GV) const;
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/// True if the target uses physical regs at Prolog/Epilog insertion
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/// time. If true (most machines), all vregs must be allocated before
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/// PEI. If false (virtual-register machines), then callee-save register
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/// spilling and scavenging are not needed or used.
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virtual bool usesPhysRegsForPEI() const { return true; }
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/// True if the target wants to use interprocedural register allocation by
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/// default. The -enable-ipra flag can be used to override this.
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virtual bool useIPRA() const {
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return false;
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}
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};
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/// This class describes a target machine that is implemented with the LLVM
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@ -349,6 +337,18 @@ public:
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bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
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raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
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MCContext &Context);
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/// True if the target uses physical regs at Prolog/Epilog insertion
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/// time. If true (most machines), all vregs must be allocated before
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/// PEI. If false (virtual-register machines), then callee-save register
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/// spilling and scavenging are not needed or used.
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virtual bool usesPhysRegsForPEI() const { return true; }
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/// True if the target wants to use interprocedural register allocation by
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/// default. The -enable-ipra flag can be used to override this.
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virtual bool useIPRA() const {
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return false;
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}
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};
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} // end namespace llvm
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