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[CostModel][X86] Regenerate vector comparison cost tests with update_analyze_test_checks.py
llvm-svn: 329497
This commit is contained in:
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787f0b993b
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@ -1,147 +1,296 @@
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=pentium4 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE2 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=yonah | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE3 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSSE3 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=penryn | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE41 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE42 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512 %s
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSE3
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSSE3
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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define i32 @cmp_float(i32 %arg) {
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; SSE2-LABEL: 'cmp_float'
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; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; SSE3-LABEL: 'cmp_float'
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; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; SSSE3-LABEL: 'cmp_float'
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; SSE41-LABEL: 'cmp_float'
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; SSE41-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; SSE42-LABEL: 'cmp_float'
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; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; AVX-LABEL: 'cmp_float'
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; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; AVX512-LABEL: 'cmp_float'
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V2F32 = fcmp olt <2 x float> undef, undef
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%V4F32 = fcmp olt <4 x float> undef, undef
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%V8F32 = fcmp olt <8 x float> undef, undef
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%V16F32 = fcmp olt <16 x float> undef, undef
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define i32 @cmp(i32 %arg) {
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; -- floats --
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;SSE2: cost of 3 {{.*}} fcmp
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;SSE3: cost of 3 {{.*}} fcmp
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;SSSE3: cost of 3 {{.*}} fcmp
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;SSE41: cost of 3 {{.*}} fcmp
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;SSE42: cost of 1 {{.*}} fcmp
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;AVX: cost of 1 {{.*}} fcmp
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%A = fcmp olt <2 x float> undef, undef
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%V2F64 = fcmp olt <2 x double> undef, undef
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%V4F64 = fcmp olt <4 x double> undef, undef
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%V8F64 = fcmp olt <8 x double> undef, undef
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%V16F64 = fcmp olt <16 x double> undef, undef
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;SSE2: cost of 7 {{.*}} fcmp
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;SSE3: cost of 7 {{.*}} fcmp
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;SSSE3: cost of 7 {{.*}} fcmp
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;SSE41: cost of 7 {{.*}} fcmp
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;SSE42: cost of 1 {{.*}} fcmp
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;AVX: cost of 1 {{.*}} fcmp
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%B = fcmp olt <4 x float> undef, undef
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;SSE2: cost of 14 {{.*}} fcmp
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;SSE3: cost of 14 {{.*}} fcmp
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;SSSE3: cost of 14 {{.*}} fcmp
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;SSE41: cost of 14 {{.*}} fcmp
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;SSE42: cost of 2 {{.*}} fcmp
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;AVX: cost of 1 {{.*}} fcmp
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%C = fcmp olt <8 x float> undef, undef
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;SSE2: cost of 3 {{.*}} fcmp
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;SSE3: cost of 3 {{.*}} fcmp
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;SSSE3: cost of 3 {{.*}} fcmp
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;SSE41: cost of 3 {{.*}} fcmp
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;SSE42: cost of 1 {{.*}} fcmp
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;AVX: cost of 1 {{.*}} fcmp
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%D = fcmp olt <2 x double> undef, undef
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;SSE2: cost of 6 {{.*}} fcmp
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;SSE3: cost of 6 {{.*}} fcmp
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;SSSE3: cost of 6 {{.*}} fcmp
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;SSE41: cost of 6 {{.*}} fcmp
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;SSE42: cost of 2 {{.*}} fcmp
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;AVX: cost of 1 {{.*}} fcmp
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%E = fcmp olt <4 x double> undef, undef
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; AVX512: cost of 1 {{.*}} %E1 = fcmp
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%E1 = fcmp olt <16 x float> undef, undef
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; AVX512: cost of 1 {{.*}} %E2 = fcmp
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%E2 = fcmp olt <8 x double> undef, undef
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; AVX512: cost of 2 {{.*}} %E3 = fcmp
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%E3 = fcmp olt <16 x double> undef, undef
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; -- integers --
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;SSE2: cost of 1 {{.*}} icmp
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;SSE3: cost of 1 {{.*}} icmp
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;SSSE3: cost of 1 {{.*}} icmp
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;SSE41: cost of 1 {{.*}} icmp
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;SSE42: cost of 1 {{.*}} icmp
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;AVX: cost of 1 {{.*}} icmp
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%F = icmp eq <16 x i8> undef, undef
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;SSE2: cost of 1 {{.*}} icmp
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;SSE3: cost of 1 {{.*}} icmp
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;SSSE3: cost of 1 {{.*}} icmp
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;SSE41: cost of 1 {{.*}} icmp
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;SSE42: cost of 1 {{.*}} icmp
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;AVX: cost of 1 {{.*}} icmp
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%G = icmp eq <8 x i16> undef, undef
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;SSE2: cost of 1 {{.*}} icmp
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;SSE3: cost of 1 {{.*}} icmp
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;SSSE3: cost of 1 {{.*}} icmp
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;SSE41: cost of 1 {{.*}} icmp
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;SSE42: cost of 1 {{.*}} icmp
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;AVX: cost of 1 {{.*}} icmp
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%H = icmp eq <4 x i32> undef, undef
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;SSE2: cost of 8 {{.*}} icmp
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;SSE3: cost of 8 {{.*}} icmp
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;SSSE3: cost of 8 {{.*}} icmp
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;SSE41: cost of 8 {{.*}} icmp
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;SSE42: cost of 1 {{.*}} icmp
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;AVX: cost of 1 {{.*}} icmp
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%I = icmp eq <2 x i64> undef, undef
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;SSE2: cost of 16 {{.*}} icmp
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;SSE3: cost of 16 {{.*}} icmp
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;SSSE3: cost of 16 {{.*}} icmp
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;SSE41: cost of 16 {{.*}} icmp
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;SSE42: cost of 2 {{.*}} icmp
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;AVX1: cost of 4 {{.*}} icmp
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;AVX2: cost of 1 {{.*}} icmp
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%J = icmp eq <4 x i64> undef, undef
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;SSE2: cost of 2 {{.*}} icmp
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;SSE3: cost of 2 {{.*}} icmp
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;SSSE3: cost of 2 {{.*}} icmp
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;SSE41: cost of 2 {{.*}} icmp
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;SSE42: cost of 2 {{.*}} icmp
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;AVX1: cost of 4 {{.*}} icmp
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;AVX2: cost of 1 {{.*}} icmp
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%K = icmp eq <8 x i32> undef, undef
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;SSE2: cost of 2 {{.*}} icmp
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;SSE3: cost of 2 {{.*}} icmp
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;SSSE3: cost of 2 {{.*}} icmp
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;SSE41: cost of 2 {{.*}} icmp
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;SSE42: cost of 2 {{.*}} icmp
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;AVX1: cost of 4 {{.*}} icmp
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;AVX2: cost of 1 {{.*}} icmp
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%L = icmp eq <16 x i16> undef, undef
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;SSE2: cost of 2 {{.*}} icmp
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;SSE3: cost of 2 {{.*}} icmp
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;SSSE3: cost of 2 {{.*}} icmp
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;SSE41: cost of 2 {{.*}} icmp
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;SSE42: cost of 2 {{.*}} icmp
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;AVX1: cost of 4 {{.*}} icmp
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;AVX2: cost of 1 {{.*}} icmp
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%M = icmp eq <32 x i8> undef, undef
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; AVX512: cost of 1 {{.*}} %M1 = icmp
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%M1 = icmp eq <16 x i32> undef, undef
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; AVX512: cost of 1 {{.*}} %M2 = icmp
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%M2 = icmp eq <8 x i64> undef, undef
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; AVX512: cost of 2 {{.*}} %M3 = icmp
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%M3 = icmp eq <16 x i64> undef, undef
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;CHECK: cost of 0 {{.*}} ret
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ret i32 undef
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}
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define i32 @cmp_int(i32 %arg) {
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; SSE2-LABEL: 'cmp_int'
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; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
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; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; SSE2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; SSE3-LABEL: 'cmp_int'
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; SSSE3-LABEL: 'cmp_int'
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; SSE41-LABEL: 'cmp_int'
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; SSE42-LABEL: 'cmp_int'
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; AVX1-LABEL: 'cmp_int'
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; AVX2-LABEL: 'cmp_int'
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; AVX512F-LABEL: 'cmp_int'
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
; AVX512BW-LABEL: 'cmp_int'
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
|
||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
%V16I8 = icmp eq <16 x i8> undef, undef
|
||||
%V32I8 = icmp eq <32 x i8> undef, undef
|
||||
%V64I8 = icmp eq <64 x i8> undef, undef
|
||||
%V128I8 = icmp eq <128 x i8> undef, undef
|
||||
|
||||
%V8I16 = icmp eq <8 x i16> undef, undef
|
||||
%V16I16 = icmp eq <16 x i16> undef, undef
|
||||
%V32I16 = icmp eq <32 x i16> undef, undef
|
||||
%V64I16 = icmp eq <64 x i16> undef, undef
|
||||
|
||||
%V4I32 = icmp eq <4 x i32> undef, undef
|
||||
%V8I32 = icmp eq <8 x i32> undef, undef
|
||||
%V16I32 = icmp eq <16 x i32> undef, undef
|
||||
%V32I32 = icmp eq <32 x i32> undef, undef
|
||||
|
||||
%V2I64 = icmp eq <2 x i64> undef, undef
|
||||
%V4I64 = icmp eq <4 x i64> undef, undef
|
||||
%V8I64 = icmp eq <8 x i64> undef, undef
|
||||
%V16I64 = icmp eq <16 x i64> undef, undef
|
||||
|
||||
ret i32 undef
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user