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Fix stack-clash probing for large static alloca

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Differential Revision: https://reviews.llvm.org/D82867
This commit is contained in:
serge-sans-paille 2020-06-30 14:04:00 +02:00
parent ffe142881c
commit 81d0d1ecfb
4 changed files with 22 additions and 20 deletions
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22
lib/Target/X86/X86FrameLowering.cpp
View File

@ -636,16 +636,16 @@ void X86FrameLowering::emitStackProbeInlineGenericLoop(
MF.insert(MBBIter, testMBB); MF.insert(MBBIter, testMBB);
MF.insert(MBBIter, tailMBB); MF.insert(MBBIter, tailMBB);
Register FinalStackPtr = Uses64BitFramePtr ? X86::R11 : X86::R11D; Register FinalStackProbed = Uses64BitFramePtr ? X86::R11 : X86::R11D;
BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::COPY), FinalStackPtr) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::COPY), FinalStackProbed)
.addReg(StackPtr) .addReg(StackPtr)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
// save loop bound // save loop bound
{ {
const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset); const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
BuildMI(MBB, MBBI, DL, TII.get(Opc), FinalStackPtr) BuildMI(MBB, MBBI, DL, TII.get(Opc), FinalStackProbed)
.addReg(FinalStackPtr) .addReg(FinalStackProbed)
.addImm(Offset / StackProbeSize * StackProbeSize) .addImm(Offset / StackProbeSize * StackProbeSize)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
} }
@ -669,13 +669,13 @@ void X86FrameLowering::emitStackProbeInlineGenericLoop(
// cmp with stack pointer bound // cmp with stack pointer bound
BuildMI(testMBB, DL, TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr)) BuildMI(testMBB, DL, TII.get(Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))
.addReg(StackPtr) .addReg(StackPtr)
.addReg(FinalStackPtr) .addReg(FinalStackProbed)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
// jump // jump
BuildMI(testMBB, DL, TII.get(X86::JCC_1)) BuildMI(testMBB, DL, TII.get(X86::JCC_1))
.addMBB(testMBB) .addMBB(testMBB)
.addImm(X86::COND_L) .addImm(X86::COND_NE)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
testMBB->addSuccessor(testMBB); testMBB->addSuccessor(testMBB);
testMBB->addSuccessor(tailMBB); testMBB->addSuccessor(tailMBB);
@ -686,10 +686,12 @@ void X86FrameLowering::emitStackProbeInlineGenericLoop(
MBB.addSuccessor(testMBB); MBB.addSuccessor(testMBB);
// handle tail // handle tail
if (Offset % StackProbeSize) { unsigned TailOffset = Offset % StackProbeSize;
BuildMI(*tailMBB, tailMBB->begin(), DL, TII.get(TargetOpcode::COPY), if (TailOffset) {
StackPtr) const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, TailOffset);
.addReg(FinalStackPtr) BuildMI(*tailMBB, tailMBB->begin(), DL, TII.get(Opc), StackPtr)
.addReg(StackPtr)
.addImm(TailOffset)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
} }

4
lib/Target/X86/X86ISelLowering.cpp
View File

@ -31800,8 +31800,8 @@ X86TargetLowering::EmitLoweredProbedAlloca(MachineInstr &MI,
BuildMI(testMBB, DL, BuildMI(testMBB, DL,
TII->get(TFI.Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr)) TII->get(TFI.Uses64BitFramePtr ? X86::CMP64rr : X86::CMP32rr))
.addReg(physSPReg) .addReg(FinalStackPtr)
.addReg(FinalStackPtr); .addReg(physSPReg);
BuildMI(testMBB, DL, TII->get(X86::JCC_1)) BuildMI(testMBB, DL, TII->get(X86::JCC_1))
.addMBB(tailMBB) .addMBB(tailMBB)

8
test/CodeGen/X86/stack-clash-dynamic-alloca.ll
View File

@ -23,12 +23,12 @@ attributes #0 = {"probe-stack"="inline-asm"}
; CHECK-X86-64-NEXT: leaq 15(,%rcx,4), %rcx ; CHECK-X86-64-NEXT: leaq 15(,%rcx,4), %rcx
; CHECK-X86-64-NEXT: andq $-16, %rcx ; CHECK-X86-64-NEXT: andq $-16, %rcx
; CHECK-X86-64-NEXT: subq %rcx, %rax ; CHECK-X86-64-NEXT: subq %rcx, %rax
; CHECK-X86-64-NEXT: cmpq %rax, %rsp ; CHECK-X86-64-NEXT: cmpq %rsp, %rax
; CHECK-X86-64-NEXT: jl .LBB0_3 ; CHECK-X86-64-NEXT: jl .LBB0_3
; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1 ; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
; CHECK-X86-64-NEXT: movq $0, (%rsp) ; CHECK-X86-64-NEXT: movq $0, (%rsp)
; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000 ; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
; CHECK-X86-64-NEXT: cmpq %rax, %rsp ; CHECK-X86-64-NEXT: cmpq %rsp, %rax
; CHECK-X86-64-NEXT: jge .LBB0_2 ; CHECK-X86-64-NEXT: jge .LBB0_2
; CHECK-X86-64-NEXT: .LBB0_3: ; CHECK-X86-64-NEXT: .LBB0_3:
; CHECK-X86-64-NEXT: movq %rax, %rsp ; CHECK-X86-64-NEXT: movq %rax, %rsp
@ -53,12 +53,12 @@ attributes #0 = {"probe-stack"="inline-asm"}
; CHECK-X86-32-NEXT: leal 15(,%ecx,4), %ecx ; CHECK-X86-32-NEXT: leal 15(,%ecx,4), %ecx
; CHECK-X86-32-NEXT: andl $-16, %ecx ; CHECK-X86-32-NEXT: andl $-16, %ecx
; CHECK-X86-32-NEXT: subl %ecx, %eax ; CHECK-X86-32-NEXT: subl %ecx, %eax
; CHECK-X86-32-NEXT: cmpl %eax, %esp ; CHECK-X86-32-NEXT: cmpl %esp, %eax
; CHECK-X86-32-NEXT: jl .LBB0_3 ; CHECK-X86-32-NEXT: jl .LBB0_3
; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1 ; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
; CHECK-X86-32-NEXT: movl $0, (%esp) ; CHECK-X86-32-NEXT: movl $0, (%esp)
; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000 ; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
; CHECK-X86-32-NEXT: cmpl %eax, %esp ; CHECK-X86-32-NEXT: cmpl %esp, %eax
; CHECK-X86-32-NEXT: jge .LBB0_2 ; CHECK-X86-32-NEXT: jge .LBB0_2
; CHECK-X86-32-NEXT: .LBB0_3: ; CHECK-X86-32-NEXT: .LBB0_3:
; CHECK-X86-32-NEXT: movl %eax, %esp ; CHECK-X86-32-NEXT: movl %eax, %esp

8
test/CodeGen/X86/stack-clash-large.ll
View File

@ -22,9 +22,9 @@ attributes #0 = {"probe-stack"="inline-asm"}
; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000 ; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
; CHECK-X86-64-NEXT: movq $0, (%rsp) ; CHECK-X86-64-NEXT: movq $0, (%rsp)
; CHECK-X86-64-NEXT: cmpq %r11, %rsp ; CHECK-X86-64-NEXT: cmpq %r11, %rsp
; CHECK-X86-64-NEXT: jl .LBB0_1 ; CHECK-X86-64-NEXT: jne .LBB0_1
; CHECK-X86-64-NEXT:# %bb.2: ; CHECK-X86-64-NEXT:# %bb.2:
; CHECK-X86-64-NEXT: movq %r11, %rsp ; CHECK-X86-64-NEXT: subq $2248, %rsp
; CHECK-X86-64-NEXT: .cfi_def_cfa_offset 71888 ; CHECK-X86-64-NEXT: .cfi_def_cfa_offset 71888
; CHECK-X86-64-NEXT: movl $1, 264(%rsp) ; CHECK-X86-64-NEXT: movl $1, 264(%rsp)
; CHECK-X86-64-NEXT: movl $1, 28664(%rsp) ; CHECK-X86-64-NEXT: movl $1, 28664(%rsp)
@ -41,9 +41,9 @@ attributes #0 = {"probe-stack"="inline-asm"}
; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000 ; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
; CHECK-X86-32-NEXT: movl $0, (%esp) ; CHECK-X86-32-NEXT: movl $0, (%esp)
; CHECK-X86-32-NEXT: cmpl %r11d, %esp ; CHECK-X86-32-NEXT: cmpl %r11d, %esp
; CHECK-X86-32-NEXT: jl .LBB0_1 ; CHECK-X86-32-NEXT: jne .LBB0_1
; CHECK-X86-32-NEXT:# %bb.2: ; CHECK-X86-32-NEXT:# %bb.2:
; CHECK-X86-32-NEXT: movl %r11d, %esp ; CHECK-X86-32-NEXT: subl $2380, %esp
; CHECK-X86-32-NEXT: .cfi_def_cfa_offset 72016 ; CHECK-X86-32-NEXT: .cfi_def_cfa_offset 72016
; CHECK-X86-32-NEXT: movl $1, 392(%esp) ; CHECK-X86-32-NEXT: movl $1, 392(%esp)
; CHECK-X86-32-NEXT: movl $1, 28792(%esp) ; CHECK-X86-32-NEXT: movl $1, 28792(%esp)