RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
Code Issues Projects Releases Wiki Activity

AMDGPU: Temporary drop s_mul_hi_i/u32 patterns

Browse Source 
It introduces performance regressions in several applications.

This has already been submitted downstream.

llvm-svn: 361879
This commit is contained in:
Konstantin Zhuravlyov 2019-05-28 21:18:34 +00:00
parent 2476ae717e
commit 821fc20522
2 changed files with 2 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/AMDGPU/SOPInstructions.td
View File

@ -558,12 +558,8 @@ let SubtargetPredicate = isGFX9Plus in {
def S_LSHL4_ADD_U32 : SOP2_32<"s_lshl4_add_u32">;
} // End Defs = [SCC]
let isCommutable = 1 in {
def S_MUL_HI_U32 : SOP2_32<"s_mul_hi_u32",
[(set i32:$sdst, (UniformBinFrag<mulhu> SSrc_b32:$src0, SSrc_b32:$src1))]>;
def S_MUL_HI_I32 : SOP2_32<"s_mul_hi_i32",
[(set i32:$sdst, (UniformBinFrag<mulhs> SSrc_b32:$src0, SSrc_b32:$src1))]>;
}
def S_MUL_HI_U32 : SOP2_32<"s_mul_hi_u32">;
def S_MUL_HI_I32 : SOP2_32<"s_mul_hi_i32">;
} // End SubtargetPredicate = isGFX9Plus
//===----------------------------------------------------------------------===//

5
test/CodeGen/AMDGPU/mul.ll
View File

@ -141,11 +141,6 @@ define amdgpu_kernel void @v_mul_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %
; crash with a 'failed to select' error.
; FUNC-LABEL: {{^}}s_mul_i64:
; GFX9_10-DAG: s_mul_i32
; GFX9_10-DAG: s_mul_hi_u32
; GFX9_10-DAG: s_mul_i32
; GFX9_10-DAG: s_mul_i32
; GFX9_10: s_endpgm
define amdgpu_kernel void @s_mul_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
%mul = mul i64 %a, %b
store i64 %mul, i64 addrspace(1)* %out, align 8