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Revert "[AMDGPU] Add gfx1013 target"
This reverts commit ea10a86984ea73fcec3b12d22404a15f2f59b219. A sanitizer buildbot reports an error.
This commit is contained in:
Brendon Cahoon
parent
80ea5748b2
commit
8238dc695f
@ -386,13 +386,6 @@ Every processor supports every OS ABI (see :ref:`amdgpu-os`) with the following
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``gfx1012`` ``amdgcn`` dGPU - cumode - Absolute - *rocm-amdhsa* - Radeon RX 5500
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- wavefrontsize64 flat - *pal-amdhsa* - Radeon RX 5500 XT
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- xnack scratch - *pal-amdpal*
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``gfx1013`` ``amdgcn`` APU - cumode - Absolute - *rocm-amdhsa* *TBA*
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- wavefrontsize64 flat - *pal-amdhsa*
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- xnack scratch - *pal-amdpal* .. TODO::
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Add product
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names.
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**GCN GFX10 (RDNA 2)** [AMD-GCN-GFX10-RDNA2]_
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-----------------------------------------------------------------------------------------------------------------------
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``gfx1030`` ``amdgcn`` dGPU - cumode - Absolute - *rocm-amdhsa* - Radeon RX 6800
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@ -1156,7 +1149,6 @@ The AMDGPU backend uses the following ELF header:
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``EF_AMDGPU_MACH_AMDGCN_GFX90A`` 0x03f ``gfx90a``
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*reserved* 0x040 Reserved.
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*reserved* 0x041 Reserved.
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``EF_AMDGPU_MACH_AMDGCN_GFX1013`` 0x042 ``gfx1013``
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==================================== ========== =============================
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Sections
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@ -742,11 +742,10 @@ enum : unsigned {
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EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
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EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
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EF_AMDGPU_MACH_AMDGCN_RESERVED_0X41 = 0x041,
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EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042,
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// First/last AMDGCN-based processors.
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EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
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EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1013,
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EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX90A,
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// Indicates if the "xnack" target feature is enabled for all code contained
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// in the object.
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@ -89,7 +89,6 @@ enum GPUKind : uint32_t {
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GK_GFX1010 = 71,
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GK_GFX1011 = 72,
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GK_GFX1012 = 73,
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GK_GFX1013 = 74,
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GK_GFX1030 = 75,
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GK_GFX1031 = 76,
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GK_GFX1032 = 77,
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@ -469,8 +469,6 @@ StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
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return "gfx1011";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012:
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return "gfx1012";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013:
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return "gfx1013";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030:
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return "gfx1030";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031:
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@ -549,7 +549,6 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1010, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1011, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1012, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1013, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1030, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1031, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1032, EF_AMDGPU_MACH);
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@ -109,7 +109,6 @@ constexpr GPUInfo AMDGCNGPUs[] = {
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{{"gfx1010"}, {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1011"}, {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1013"}, {"gfx1013"}, GK_GFX1013, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1032"}, {"gfx1032"}, GK_GFX1032, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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@ -221,7 +220,6 @@ AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
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case GK_GFX1010: return {10, 1, 0};
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case GK_GFX1011: return {10, 1, 1};
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case GK_GFX1012: return {10, 1, 2};
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case GK_GFX1013: return {10, 1, 3};
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case GK_GFX1030: return {10, 3, 0};
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case GK_GFX1031: return {10, 3, 1};
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case GK_GFX1032: return {10, 3, 2};
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@ -465,12 +465,6 @@ def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
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"Support mips != 0, lod != 0, gather4, and get_lod"
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>;
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def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
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"GFX10_AEncoding",
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"true",
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"Has BVH ray tracing instructions"
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>;
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def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
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"GFX10_BEncoding",
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"true",
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@ -1083,26 +1077,8 @@ def FeatureISAVersion10_1_2 : FeatureSet<
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FeatureLdsMisalignedBug,
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FeatureSupportsXNACK])>;
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def FeatureISAVersion10_1_3 : FeatureSet<
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!listconcat(FeatureGroup.GFX10_1_Bugs,
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[FeatureGFX10,
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FeatureGFX10_AEncoding,
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FeatureLDSBankCount32,
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FeatureDLInsts,
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FeatureNSAEncoding,
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FeatureWavefrontSize32,
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FeatureScalarStores,
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FeatureScalarAtomics,
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FeatureScalarFlatScratchInsts,
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FeatureGetWaveIdInst,
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FeatureMadMacF32Insts,
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FeatureDsSrc2Insts,
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FeatureLdsMisalignedBug,
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FeatureSupportsXNACK])>;
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def FeatureISAVersion10_3_0 : FeatureSet<
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[FeatureGFX10,
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FeatureGFX10_AEncoding,
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FeatureGFX10_BEncoding,
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FeatureGFX10_3Insts,
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FeatureLDSBankCount32,
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@ -1315,9 +1291,6 @@ def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
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def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
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AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
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def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
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AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
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def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
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AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
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@ -4686,15 +4686,6 @@ bool AMDGPULegalizerInfo::legalizeBVHIntrinsic(MachineInstr &MI,
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Register RayInvDir = MI.getOperand(6).getReg();
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Register TDescr = MI.getOperand(7).getReg();
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if (!ST.hasGFX10_AEncoding()) {
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DiagnosticInfoUnsupported BadIntrin(B.getMF().getFunction(),
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"intrinsic not supported on subtarget",
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MI.getDebugLoc());
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B.getMF().getFunction().getContext().diagnose(BadIntrin);
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MI.eraseFromParent();
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return false;
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}
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bool IsA16 = MRI.getType(RayDir).getElementType().getSizeInBits() == 16;
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bool Is64 = MRI.getType(NodePtr).getSizeInBits() == 64;
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unsigned Opcode = IsA16 ? Is64 ? AMDGPU::IMAGE_BVH64_INTERSECT_RAY_a16_nsa
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@ -262,7 +262,6 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
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HasGFX10A16(false),
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HasG16(false),
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HasNSAEncoding(false),
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GFX10_AEncoding(false),
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GFX10_BEncoding(false),
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HasDLInsts(false),
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HasDot1Insts(false),
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@ -208,10 +208,6 @@ def : ProcessorModel<"gfx1012", GFX10SpeedModel,
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FeatureISAVersion10_1_2.Features
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>;
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def : ProcessorModel<"gfx1013", GFX10SpeedModel,
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FeatureISAVersion10_1_3.Features
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>;
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def : ProcessorModel<"gfx1030", GFX10SpeedModel,
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FeatureISAVersion10_3_0.Features
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>;
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@ -136,7 +136,6 @@ protected:
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bool HasGFX10A16;
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bool HasG16;
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bool HasNSAEncoding;
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bool GFX10_AEncoding;
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bool GFX10_BEncoding;
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bool HasDLInsts;
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bool HasDot1Insts;
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@ -873,10 +872,6 @@ public:
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bool hasNSAEncoding() const { return HasNSAEncoding; }
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bool hasGFX10_AEncoding() const {
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return GFX10_AEncoding;
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}
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bool hasGFX10_BEncoding() const {
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return GFX10_BEncoding;
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}
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@ -105,7 +105,6 @@ StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: AK = GK_GFX1010; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: AK = GK_GFX1011; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: AK = GK_GFX1012; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013: AK = GK_GFX1013; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: AK = GK_GFX1030; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: AK = GK_GFX1031; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: AK = GK_GFX1032; break;
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@ -167,7 +166,6 @@ unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
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case GK_GFX1010: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010;
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case GK_GFX1011: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011;
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case GK_GFX1012: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012;
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case GK_GFX1013: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013;
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case GK_GFX1030: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030;
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case GK_GFX1031: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031;
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case GK_GFX1032: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032;
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@ -886,8 +886,8 @@ class MIMG_IntersectRay_nsa_gfx10<mimgopc op, string opcode, int num_addrs, bit
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multiclass MIMG_IntersectRay<mimgopc op, string opcode, int num_addrs, bit A16> {
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def "" : MIMGBaseOpcode;
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let SubtargetPredicate = HasGFX10_AEncoding,
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AssemblerPredicate = HasGFX10_AEncoding,
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let SubtargetPredicate = HasGFX10_BEncoding,
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AssemblerPredicate = HasGFX10_BEncoding,
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AsmMatchConverter = !if(A16, "cvtIntersectRay", ""),
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dmask = 0xf,
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unorm = 1,
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@ -1036,7 +1036,7 @@ defm IMAGE_SAMPLE_C_CD_CL_O_G16 : MIMG_Sampler <mimgopc<0xef>, AMDGPUSample_c_cd
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//def IMAGE_RSRC256 : MIMG_NoPattern_RSRC256 <"image_rsrc256", 0x0000007e>;
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//def IMAGE_SAMPLER : MIMG_NoPattern_ <"image_sampler", 0x0000007f>;
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let SubtargetPredicate = HasGFX10_AEncoding in
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let SubtargetPredicate = HasGFX10_BEncoding in
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defm IMAGE_MSAA_LOAD_X : MIMG_NoSampler <mimgopc<0x80>, "image_msaa_load", 1, 0, 0, 1>;
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defm IMAGE_BVH_INTERSECT_RAY : MIMG_IntersectRay<mimgopc<0xe6>, "image_bvh_intersect_ray", 11, 0>;
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@ -7341,11 +7341,6 @@ SDValue SITargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
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assert(RayDir.getValueType() == MVT::v4f16 ||
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RayDir.getValueType() == MVT::v4f32);
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if (!Subtarget->hasGFX10_AEncoding()) {
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emitRemovedIntrinsicError(DAG, DL, Op.getValueType());
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return SDValue();
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}
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bool IsA16 = RayDir.getValueType().getVectorElementType() == MVT::f16;
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bool Is64 = NodePtr.getValueType() == MVT::i64;
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unsigned Opcode = IsA16 ? Is64 ? AMDGPU::IMAGE_BVH64_INTERSECT_RAY_a16_nsa
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@ -1447,10 +1447,6 @@ bool isGCN3Encoding(const MCSubtargetInfo &STI) {
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return STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding];
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}
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bool isGFX10_AEncoding(const MCSubtargetInfo &STI) {
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return STI.getFeatureBits()[AMDGPU::FeatureGFX10_AEncoding];
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}
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bool isGFX10_BEncoding(const MCSubtargetInfo &STI) {
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return STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding];
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}
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@ -737,7 +737,6 @@ bool isGFX9Plus(const MCSubtargetInfo &STI);
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bool isGFX10(const MCSubtargetInfo &STI);
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bool isGFX10Plus(const MCSubtargetInfo &STI);
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bool isGCN3Encoding(const MCSubtargetInfo &STI);
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bool isGFX10_AEncoding(const MCSubtargetInfo &STI);
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bool isGFX10_BEncoding(const MCSubtargetInfo &STI);
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bool hasGFX10_3Insts(const MCSubtargetInfo &STI);
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bool isGFX90A(const MCSubtargetInfo &STI);
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@ -1,7 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1013 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: not --crash llc -global-isel -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s -o /dev/null 2>&1 | FileCheck -check-prefix=ERR %s
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; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(uint node_ptr, float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, uint4 texture_descr)
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; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(uint node_ptr, float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, uint4 texture_descr)
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@ -19,7 +17,6 @@ define amdgpu_ps <4 x float> @image_bvh_intersect_ray(i32 %node_ptr, float %ray_
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; GCN-NEXT: image_bvh_intersect_ray v[0:3], [v0, v1, v2, v3, v4, v6, v7, v8, v10, v11, v12], s[0:3]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: ; return to shader part epilog
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; ERR: in function image_bvh_intersect_ray{{.*}}intrinsic not supported on subtarget
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%v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr)
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%r = bitcast <4 x i32> %v to <4 x float>
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ret <4 x float> %r
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@ -80,9 +80,6 @@
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1012 < %s | FileCheck --check-prefixes=V3-GFX1012-XNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1012 -mattr=-xnack < %s | FileCheck --check-prefixes=V3-GFX1012-NOXNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1012 -mattr=+xnack < %s | FileCheck --check-prefixes=V3-GFX1012-XNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1013 < %s | FileCheck --check-prefixes=V3-GFX1013-XNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1013 -mattr=-xnack < %s | FileCheck --check-prefixes=V3-GFX1013-NOXNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1013 -mattr=+xnack < %s | FileCheck --check-prefixes=V3-GFX1013-XNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1030 < %s | FileCheck --check-prefixes=V3-GFX1030 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1031 < %s | FileCheck --check-prefixes=V3-GFX1031 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1032 < %s | FileCheck --check-prefixes=V3-GFX1032 %s
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@ -171,9 +168,6 @@
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1012 < %s | FileCheck --check-prefixes=GFX1012 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1012 -mattr=-xnack < %s | FileCheck --check-prefixes=GFX1012-NOXNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1012 -mattr=+xnack < %s | FileCheck --check-prefixes=GFX1012-XNACK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1013 < %s | FileCheck --check-prefixes=GFX1013 %s
|
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1013 -mattr=-xnack < %s | FileCheck --check-prefixes=GFX1013-NOXNACK %s
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1013 -mattr=+xnack < %s | FileCheck --check-prefixes=GFX1013-XNACK %s
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck --check-prefixes=GFX1030 %s
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 < %s | FileCheck --check-prefixes=GFX1031 %s
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1032 < %s | FileCheck --check-prefixes=GFX1032 %s
|
||||
@ -220,8 +214,6 @@
|
||||
; V3-GFX1011-XNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1011+xnack"
|
||||
; V3-GFX1012-NOXNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1012"
|
||||
; V3-GFX1012-XNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1012+xnack"
|
||||
; V3-GFX1013-NOXNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1013"
|
||||
; V3-GFX1013-XNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1013+xnack"
|
||||
; V3-GFX1030: .amdgcn_target "amdgcn-amd-amdhsa--gfx1030"
|
||||
; V3-GFX1031: .amdgcn_target "amdgcn-amd-amdhsa--gfx1031"
|
||||
; V3-GFX1032: .amdgcn_target "amdgcn-amd-amdhsa--gfx1032"
|
||||
@ -288,9 +280,6 @@
|
||||
; GFX1012: .amdgcn_target "amdgcn-amd-amdhsa--gfx1012"
|
||||
; GFX1012-NOXNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1012:xnack-"
|
||||
; GFX1012-XNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1012:xnack+"
|
||||
; GFX1013: .amdgcn_target "amdgcn-amd-amdhsa--gfx1013"
|
||||
; GFX1013-NOXNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1013:xnack-"
|
||||
; GFX1013-XNACK: .amdgcn_target "amdgcn-amd-amdhsa--gfx1013:xnack+"
|
||||
; GFX1030: .amdgcn_target "amdgcn-amd-amdhsa--gfx1030"
|
||||
; GFX1031: .amdgcn_target "amdgcn-amd-amdhsa--gfx1031"
|
||||
; GFX1032: .amdgcn_target "amdgcn-amd-amdhsa--gfx1032"
|
||||
|
||||
@ -57,7 +57,6 @@
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1010 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1010 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1011 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1011 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1012 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1012 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1013 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1013 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1030 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1030 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1031 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1031 %s
|
||||
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1032 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1032 %s
|
||||
@ -117,7 +116,6 @@
|
||||
; GFX1010: EF_AMDGPU_MACH_AMDGCN_GFX1010 (0x33)
|
||||
; GFX1011: EF_AMDGPU_MACH_AMDGCN_GFX1011 (0x34)
|
||||
; GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
|
||||
; GFX1013: EF_AMDGPU_MACH_AMDGCN_GFX1013 (0x42)
|
||||
; GFX1030: EF_AMDGPU_MACH_AMDGCN_GFX1030 (0x36)
|
||||
; GFX1031: EF_AMDGPU_MACH_AMDGCN_GFX1031 (0x37)
|
||||
; GFX1032: EF_AMDGPU_MACH_AMDGCN_GFX1032 (0x38)
|
||||
|
||||
@ -1,6 +1,4 @@
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx1013 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
||||
; RUN: not --crash llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=ERR %s
|
||||
|
||||
; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(uint node_ptr, float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, uint4 texture_descr)
|
||||
; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(uint node_ptr, float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, uint4 texture_descr)
|
||||
@ -14,7 +12,6 @@ declare <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16(i64, float, <4
|
||||
|
||||
; GCN-LABEL: {{^}}image_bvh_intersect_ray:
|
||||
; GCN: image_bvh_intersect_ray v[0:3], v[0:15], s[0:3]{{$}}
|
||||
; ERR: in function image_bvh_intersect_ray{{.*}}intrinsic not supported on subtarget
|
||||
; Arguments are flattened to represent the actual VGPR_A layout, so we have no
|
||||
; extra moves in the generated kernel.
|
||||
define amdgpu_ps <4 x float> @image_bvh_intersect_ray(i32 %node_ptr, float %ray_extent, float %ray_origin_x, float %ray_origin_y, float %ray_origin_z, float %ray_dir_x, float %ray_dir_y, float %ray_dir_z, float %ray_inv_dir_x, float %ray_inv_dir_y, float %ray_inv_dir_z, <4 x i32> inreg %tdescr) {
|
||||
|
||||
@ -2,7 +2,6 @@
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck %s --check-prefix=GFX906-GFX908
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck %s --check-prefix=GFX1013
|
||||
|
||||
//
|
||||
// Test unsupported GPUs.
|
||||
@ -13,25 +12,18 @@ v_fmac_f32 v0, v1, v2
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
v_xnor_b32 v0, v1, v2
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot2_f32_f16 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot2_i32_i16 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot2_u32_u16 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot4_i32_i8 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot4_u32_u8 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot8_i32_i4 v0, v1, v2, v3
|
||||
// CHECK: error: instruction not supported on this GPU
|
||||
// GFX1013: error: instruction not supported on this GPU
|
||||
v_dot8_u32_u4 v0, v1, v2, v3
|
||||
|
||||
//
|
||||
|
||||
@ -1,6 +1,5 @@
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
|
||||
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1013 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Unsupported instructions.
|
||||
|
||||
@ -162,10 +162,6 @@
|
||||
# RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1012 | FileCheck --check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1012 %s
|
||||
# RUN: obj2yaml %t.o.AMDGCN_GFX1012 | FileCheck --check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1012 %s
|
||||
|
||||
# RUN: sed -e 's/<BITS>/64/' -e 's/<MACH>/AMDGCN_GFX1013/' %s | yaml2obj -o %t.o.AMDGCN_GFX1013
|
||||
# RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1013 | FileCheck --check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1013 %s
|
||||
# RUN: obj2yaml %t.o.AMDGCN_GFX1013 | FileCheck --check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1013 %s
|
||||
|
||||
# RUN: sed -e 's/<BITS>/64/' -e 's/<MACH>/AMDGCN_GFX1030/' %s | yaml2obj -o %t.o.AMDGCN_GFX1030
|
||||
# RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1030 | FileCheck --check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1030 %s
|
||||
# RUN: obj2yaml %t.o.AMDGCN_GFX1030 | FileCheck --check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1030 %s
|
||||
@ -326,9 +322,6 @@
|
||||
# ELF-AMDGCN-GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
|
||||
# YAML-AMDGCN-GFX1012: Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1012 ]
|
||||
|
||||
# ELF-AMDGCN-GFX1013: EF_AMDGPU_MACH_AMDGCN_GFX1013 (0x42)
|
||||
# YAML-AMDGCN-GFX1013: Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1013 ]
|
||||
|
||||
# ELF-AMDGCN-GFX1030: EF_AMDGPU_MACH_AMDGCN_GFX1030 (0x36)
|
||||
# YAML-AMDGCN-GFX1030: Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1030 ]
|
||||
|
||||
|
||||
@ -31,11 +31,6 @@ define amdgpu_kernel void @test_kernel() {
|
||||
; RUN: llvm-objdump -D %t.o > %t-detect.txt
|
||||
; RUN: diff %t-specify.txt %t-detect.txt
|
||||
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1013 -filetype=obj -O0 -o %t.o %s
|
||||
; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx1013 %t.o > %t-specify.txt
|
||||
; RUN: llvm-objdump -D %t.o > %t-detect.txt
|
||||
; RUN: diff %t-specify.txt %t-detect.txt
|
||||
|
||||
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1012 -filetype=obj -O0 -o %t.o %s
|
||||
; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx1012 %t.o > %t-specify.txt
|
||||
; RUN: llvm-objdump -D %t.o > %t-detect.txt
|
||||
|
||||
@ -223,15 +223,6 @@
|
||||
# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1012
|
||||
# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1012 -DFLAG_VALUE=0x35
|
||||
|
||||
# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013
|
||||
# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013 -DFLAG_VALUE=0x42
|
||||
|
||||
# RUN: yaml2obj %s -o %t -DABI_VERSION=1 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013
|
||||
# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013 -DFLAG_VALUE=0x42
|
||||
|
||||
# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013
|
||||
# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1013 -DFLAG_VALUE=0x42
|
||||
|
||||
# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1030
|
||||
# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1030 -DFLAG_VALUE=0x36
|
||||
|
||||
|
||||
@ -1482,7 +1482,6 @@ static const EnumEntry<unsigned> ElfHeaderAMDGPUFlagsABIVersion3[] = {
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1013),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1030),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1031),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1032),
|
||||
@ -1535,7 +1534,6 @@ static const EnumEntry<unsigned> ElfHeaderAMDGPUFlagsABIVersion4[] = {
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1013),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1030),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1031),
|
||||
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1032),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user