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[PPCInstPrinter] Change printBranchOperand(calltarget) to print the target address in hexadecimal form

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```
// llvm-objdump -d output (before)
0: bl .-4
4: bl .+0
8: bl .+4

// llvm-objdump -d output (after) ; GNU objdump -d
0: bl 0xfffffffc / bl 0xfffffffffffffffc
4: bl 0x4
8: bl 0xc
```

Many Operand's are not annotated as OPERAND_PCREL.
They are not affected (e.g. `b .+67108860`). I plan to fix them in future patches.

Modified test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s to test
address space wraparound for powerpc32 and powerpc64.

Reviewed By: sfertile, jhenderson

Differential Revision: https://reviews.llvm.org/D76591
This commit is contained in:
Fangrui Song 2020-03-22 23:03:09 -07:00
parent 3d2508df1f
commit 82533e3f53
5 changed files with 31 additions and 24 deletions
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35
lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
View File

@ -413,23 +413,30 @@ void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
printOperand(MI, OpNo, O);
}
void PPCInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
void PPCInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
unsigned OpNo, raw_ostream &O,
bool RelativeForm) {
if (!MI->getOperand(OpNo).isImm())
return printOperand(MI, OpNo, O);
// Branches can take an immediate operand. This is used by the branch
// selection pass to print, for example `.+8` (for ELF) or `$+8` (for AIX) to
// express an eight byte displacement from the program counter.
if (!TT.isOSAIX())
O << ".";
else
O << "$";
int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2);
if (Imm >= 0)
O << "+";
O << Imm;
if (PrintBranchImmAsAddress && !RelativeForm) {
uint64_t Target = Address + Imm;
if (!TT.isPPC64())
Target &= 0xffffffff;
O << formatHex(Target);
} else {
// Branches can take an immediate operand. This is used by the branch
// selection pass to print, for example `.+8` (for ELF) or `$+8` (for AIX)
// to express an eight byte displacement from the program counter.
if (!TT.isOSAIX())
O << ".";
else
O << "$";
if (Imm >= 0)
O << "+";
O << Imm;
}
}
void PPCInstPrinter::printAbsBranchOperand(const MCInst *MI, unsigned OpNo,

8
lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
View File

@ -64,10 +64,10 @@ public:
void printS34ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printImmZeroOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printBranchOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNo,
raw_ostream &O) {
printBranchOperand(MI, OpNo, O);
void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo,
raw_ostream &O, bool RelativeForm = false);
void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
printBranchOperand(MI, 0, OpNo, O, true);
}
void printAbsBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printTLSCall(const MCInst *MI, unsigned OpNo, raw_ostream &O);

2
test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
View File

@ -105,7 +105,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-DIS-NEXT: 10: 7c 08 02 a6 mflr 0
; 32-DIS-NEXT: 14: 90 01 00 08 stw 0, 8(1)
; 32-DIS-NEXT: 18: 94 21 ff c0 stwu 1, -64(1)
; 32-DIS-NEXT: 1c: 4b ff ff e5 bl .-28
; 32-DIS-NEXT: 1c: 4b ff ff e5 bl 0x0
; 32-DIS-NEXT: 20: 60 00 00 00 nop
; 32-DIS-NEXT: 24: 38 21 00 40 addi 1, 1, 64
; 32-DIS-NEXT: 28: 80 01 00 08 lwz 0, 8(1)

2
test/CodeGen/PowerPC/aix-xcoff-reloc.ll
View File

@ -415,7 +415,7 @@ declare i32 @bar(i32)
; DIS-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; DIS-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
; DIS-NEXT: c: 38 60 00 01 li 3, 1
; DIS-NEXT: 10: 4b ff ff f1 bl .-16
; DIS-NEXT: 10: 4b ff ff f1 bl 0x0
; DIS-NEXT: 14: 60 00 00 00 nop
; DIS-NEXT: 18: 80 82 00 00 lwz 4, 0(2)
; DIS-NEXT: 1c: 80 a2 00 04 lwz 5, 4(2)

8
test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
View File

@ -8,10 +8,10 @@
# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s
# CHECK-LABEL: <bl>:
# ELF32-NEXT: bl .-4
# ELF64-NEXT: bl .-4
# CHECK-NEXT: bl .+0
# CHECK-NEXT: bl .+4
# ELF32-NEXT: bl 0xfffffffc
# ELF64-NEXT: bl 0xfffffffffffffffc
# CHECK-NEXT: bl 0x4
# CHECK-NEXT: bl 0xc
bl:
bl .-4