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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00

Remove calls to bare getSubtarget and clean up the functions

accordingly.

llvm-svn: 227535
This commit is contained in:
Eric Christopher 2015-01-30 01:30:01 +00:00
parent 426900172c
commit 826ea4a145
2 changed files with 9 additions and 11 deletions

View File

@ -144,19 +144,19 @@ namespace {
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
if (AFI->getGlobalBaseReg() == 0) if (AFI->getGlobalBaseReg() == 0)
return false; return false;
const ARMSubtarget &STI =
const ARMTargetMachine *TM = static_cast<const ARMSubtarget &>(MF.getSubtarget());
static_cast<const ARMTargetMachine *>(&MF.getTarget()); const TargetMachine &TM = MF.getTarget();
if (TM->getRelocationModel() != Reloc::PIC_) if (TM.getRelocationModel() != Reloc::PIC_)
return false; return false;
LLVMContext *Context = &MF.getFunction()->getContext(); LLVMContext *Context = &MF.getFunction()->getContext();
unsigned ARMPCLabelIndex = AFI->createPICLabelUId(); unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
unsigned PCAdj = TM->getSubtarget<ARMSubtarget>().isThumb() ? 4 : 8; unsigned PCAdj = STI.isThumb() ? 4 : 8;
ARMConstantPoolValue *CPV = ARMConstantPoolSymbol::Create( ARMConstantPoolValue *CPV = ARMConstantPoolSymbol::Create(
*Context, "_GLOBAL_OFFSET_TABLE_", ARMPCLabelIndex, PCAdj); *Context, "_GLOBAL_OFFSET_TABLE_", ARMPCLabelIndex, PCAdj);
unsigned Align = TM->getDataLayout()->getPrefTypeAlignment( unsigned Align = TM.getDataLayout()->getPrefTypeAlignment(
Type::getInt32PtrTy(*Context)); Type::getInt32PtrTy(*Context));
unsigned Idx = MF.getConstantPool()->getConstantPoolIndex(CPV, Align); unsigned Idx = MF.getConstantPool()->getConstantPoolIndex(CPV, Align);
@ -165,8 +165,6 @@ namespace {
DebugLoc DL = FirstMBB.findDebugLoc(MBBI); DebugLoc DL = FirstMBB.findDebugLoc(MBBI);
unsigned TempReg = unsigned TempReg =
MF.getRegInfo().createVirtualRegister(&ARM::rGPRRegClass); MF.getRegInfo().createVirtualRegister(&ARM::rGPRRegClass);
const ARMSubtarget &STI =
static_cast<const ARMSubtarget &>(MF.getSubtarget());
unsigned Opc = STI.isThumb2() ? ARM::t2LDRpci : ARM::LDRcp; unsigned Opc = STI.isThumb2() ? ARM::t2LDRpci : ARM::LDRcp;
const TargetInstrInfo &TII = *STI.getInstrInfo(); const TargetInstrInfo &TII = *STI.getInstrInfo();
MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL, MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL,
@ -185,7 +183,6 @@ namespace {
if (Opc == ARM::PICADD) if (Opc == ARM::PICADD)
AddDefaultPred(MIB); AddDefaultPred(MIB);
return true; return true;
} }

View File

@ -8,7 +8,7 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "ARMTargetObjectFile.h" #include "ARMTargetObjectFile.h"
#include "ARMSubtarget.h" #include "ARMTargetMachine.h"
#include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringExtras.h"
#include "llvm/IR/Mangler.h" #include "llvm/IR/Mangler.h"
#include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCAsmInfo.h"
@ -27,7 +27,8 @@ using namespace dwarf;
void ARMElfTargetObjectFile::Initialize(MCContext &Ctx, void ARMElfTargetObjectFile::Initialize(MCContext &Ctx,
const TargetMachine &TM) { const TargetMachine &TM) {
bool isAAPCS_ABI = TM.getSubtarget<ARMSubtarget>().isAAPCS_ABI(); bool isAAPCS_ABI = static_cast<const ARMTargetMachine &>(TM).TargetABI ==
ARMTargetMachine::ARMABI::ARM_ABI_AAPCS;
TargetLoweringObjectFileELF::Initialize(Ctx, TM); TargetLoweringObjectFileELF::Initialize(Ctx, TM);
InitializeELF(isAAPCS_ABI); InitializeELF(isAAPCS_ABI);