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The new t2LEApcrel* pseudo instructions need the size specified.

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rdar://8768390

llvm-svn: 121876
This commit is contained in:
Jim Grosbach 2010-12-15 18:48:45 +00:00
parent 202d654195
commit 8278d5692a
2 changed files with 13 additions and 5 deletions
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7
lib/Target/ARM/ARMInstrFormats.td
View File

@ -266,6 +266,13 @@ class tPseudoInst<dag oops, dag iops, SizeFlagVal sz, InstrItinClass itin,
list<Predicate> Predicates = [IsThumb];
}
// PseudoInst that's Thumb2-mode only.
class t2PseudoInst<dag oops, dag iops, SizeFlagVal sz, InstrItinClass itin,
list<dag> pattern>
: PseudoInst<oops, iops, itin, pattern> {
let SZ = sz;
list<Predicate> Predicates = [IsThumb2];
}
// Almost all ARM instructions are predicable.
class I<dag oops, dag iops, AddrMode am, SizeFlagVal sz,
IndexMode im, Format f, InstrItinClass itin,

11
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -1156,11 +1156,12 @@ def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd),
}
let neverHasSideEffects = 1, isReMaterializable = 1 in
def t2LEApcrel : PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
IIC_iALUi, []>;
def t2LEApcrelJT : PseudoInst<(outs rGPR:$Rd),
(ins i32imm:$label, nohash_imm:$id, pred:$p), IIC_iALUi,
[]>;
def t2LEApcrel : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
Size4Bytes, IIC_iALUi, []>;
def t2LEApcrelJT : t2PseudoInst<(outs rGPR:$Rd),
(ins i32imm:$label, nohash_imm:$id, pred:$p),
Size4Bytes, IIC_iALUi,
[]>;
// FIXME: None of these add/sub SP special instructions should be necessary