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[RegisterCoalescer] Fix an overzealous assert
Although removeCopyByCommutingDef deals with full copies, it is still possible to copy undef lanes and thus, we wouldn't have any a value number for these lanes. This fixes PR40215. llvm-svn: 365256
This commit is contained in:
Quentin Colombet
parent
58743bfc1b
commit
82b078300a
@ -935,7 +935,14 @@ RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
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const SlotIndexes &Indexes = *LIS->getSlotIndexes();
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for (LiveInterval::SubRange &SA : IntA.subranges()) {
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VNInfo *ASubValNo = SA.getVNInfoAt(AIdx);
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assert(ASubValNo != nullptr);
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// Even if we are dealing with a full copy, some lanes can
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// still be undefined.
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// E.g.,
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// undef A.subLow = ...
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// B = COPY A <== A.subHigh is undefined here and does
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// not have a value number.
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if (!ASubValNo)
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continue;
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MaskA |= SA.LaneMask;
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IntB.refineSubRanges(
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@ -0,0 +1,131 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass simple-register-coalescing %s -systemz-subreg-liveness -O3 -mtriple s390x-ibm-linux -mcpu z13 -o - | FileCheck %s
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#
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# When the coalescing tries to coalesce `%20 = COPY %18`,
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# %18 has been coalesced all the way up to %15 = ROSBG.
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# ROSBG has tied operands and can be commuted, thus it
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# maybe possible to swap the arguments of ROSBG to coalesce
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# this copy. That's what the coalescer attempts.
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#
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# This used to produce an assertion failure in the coalescer,
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# because this particular coalescing trick is used only on
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# full copy. Therefore we were asserting that all the subranges
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# at the point of the copy had a value number.
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# This is actually not true in that example, because %18 is
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# only partial defined before being fully copied.
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#
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# PR40215.
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---
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name: main
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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; CHECK-LABEL: name: main
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: [[LGHI:%[0-9]+]]:addr64bit = LGHI -30
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; CHECK: [[LHIMux:%[0-9]+]]:grx32bit = LHIMux 1
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; CHECK: [[LHIMux1:%[0-9]+]]:grx32bit = LHIMux 0
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; CHECK: undef %20.subreg_l32:gr64bit = IMPLICIT_DEF
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; CHECK: bb.1:
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; CHECK: successors: %bb.3(0x00000001), %bb.4(0x7fffffff)
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; CHECK: CHIMux [[LHIMux]], 0, implicit-def $cc
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; CHECK: BRC 14, 6, %bb.3, implicit killed $cc
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; CHECK: J %bb.4
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; CHECK: bb.2:
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; CHECK: successors:
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; CHECK: STMux %20.subreg_l32, undef %8:addr64bit, 0, $noreg :: (store 4 into `i32* undef`)
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; CHECK: bb.3:
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; CHECK: successors:
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; CHECK: bb.4:
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; CHECK: successors: %bb.5(0x30000000), %bb.6(0x50000000)
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; CHECK: [[LAY:%[0-9]+]]:gr64bit = LAY [[LGHI]], 19838, $noreg
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; CHECK: [[LAY1:%[0-9]+]]:gr64bit = LAY [[LGHI]], 19840, $noreg
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; CHECK: [[LAY2:%[0-9]+]]:gr64bit = LAY [[LGHI]], 19844, $noreg
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; CHECK: [[OGR:%[0-9]+]]:gr64bit = OGR [[OGR]], [[LAY]], implicit-def dead $cc
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; CHECK: undef %19.subreg_l32:gr64bit = AHIMuxK [[LGHI]].subreg_l32, 19843, implicit-def dead $cc
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; CHECK: [[ROSBG:%[0-9]+]]:gr64bit = ROSBG [[ROSBG]], [[OGR]], 32, 63, 0, implicit-def dead $cc
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; The coalescer should have been able to swap the operands of
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; the OR, hence eliminating the copy of %20 and %18.
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; This is also visible here because the ROSBG operand was LHS
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; before the coalescer, now it is RHS.
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; CHECK: %20.subreg_l32:gr64bit = OR %20.subreg_l32, [[ROSBG]].subreg_l32, implicit-def dead $cc
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; CHECK: [[ROSBG1:%[0-9]+]]:gr64bit = ROSBG [[ROSBG1]], [[LAY1]], 32, 63, 0, implicit-def dead $cc
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; CHECK: CHIMux [[LHIMux1]], 0, implicit-def $cc
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; CHECK: BRC 14, 6, %bb.6, implicit killed $cc
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; CHECK: J %bb.5
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; CHECK: bb.5:
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; CHECK: successors: %bb.6(0x80000000)
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; CHECK: bb.6:
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; CHECK: successors: %bb.2(0x00000001), %bb.7(0x7fffffff)
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; CHECK: [[LGHI]]:addr64bit = nuw nsw LA [[LGHI]], 6, $noreg
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; CHECK: CGHI [[LGHI]], 0, implicit-def $cc
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; CHECK: BRC 14, 8, %bb.2, implicit killed $cc
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; CHECK: bb.7:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: J %bb.1
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bb.0:
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%6:gr64bit = LGHI -30
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%8:grx32bit = LHIMux 1
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%21:grx32bit = LHIMux 0
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%23:addr64bit = COPY killed %6
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%24:gr32bit = IMPLICIT_DEF
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bb.1:
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successors: %bb.3(0x00000001), %bb.4(0x7fffffff)
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%1:gr32bit = COPY killed %24
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%0:addr64bit = COPY killed %23
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CHIMux %8, 0, implicit-def $cc
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BRC 14, 6, %bb.3, implicit killed $cc
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J %bb.4
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bb.2:
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successors:
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STMux killed %4, undef %22:addr64bit, 0, $noreg :: (store 4 into `i32* undef`)
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bb.3:
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successors:
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bb.4:
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successors: %bb.5(0x30000000), %bb.6(0x50000000)
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%2:gr64bit = LAY %0, 19838, $noreg
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%3:gr64bit = LAY %0, 19840, $noreg
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%9:gr64bit = LAY %0, 19844, $noreg
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%10:gr64bit = COPY killed %9
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%10:gr64bit = OGR %10, killed %2, implicit-def dead $cc
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%11:gr32bit = COPY %0.subreg_l32
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%12:gr32bit = AHIMuxK killed %11, 19843, implicit-def dead $cc
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undef %13.subreg_l32:gr64bit = COPY killed %12
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%15:gr64bit = COPY killed %13
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%15:gr64bit = ROSBG %15, killed %10, 32, 63, 0, implicit-def dead $cc
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%16:gr32bit = COPY killed %15.subreg_l32
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%17:gr32bit = COPY killed %16
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%17:gr32bit = OR %17, killed %1, implicit-def dead $cc
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undef %18.subreg_l32:gr64bit = COPY killed %17
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%20:gr64bit = COPY killed %18
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%20:gr64bit = ROSBG %20, killed %3, 32, 63, 0, implicit-def dead $cc
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CHIMux %21, 0, implicit-def $cc
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BRC 14, 6, %bb.6, implicit killed $cc
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J %bb.5
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bb.5:
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bb.6:
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successors: %bb.2(0x00000001), %bb.7(0x7fffffff)
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%4:grx32bit = COPY killed %20.subreg_l32
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%5:gr64bit = nuw nsw LA killed %0, 6, $noreg
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CGHI %5, 0, implicit-def $cc
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BRC 14, 8, %bb.2, implicit killed $cc
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bb.7:
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%23:addr64bit = COPY killed %5
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%24:gr32bit = COPY killed %4
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J %bb.1
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...
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