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Add support for "m" inline asm constraints.
llvm-svn: 28728
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8affee249a
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@ -128,7 +128,13 @@ namespace {
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bool TryFoldLoad(SDOperand P, SDOperand N,
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SDOperand &Base, SDOperand &Scale,
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SDOperand &Index, SDOperand &Disp);
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/// SelectInlineAsmMemoryOperand - Implement addressing mode selection for
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/// inline asm expressions.
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virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op,
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char ConstraintCode,
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std::vector<SDOperand> &OutOps,
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SelectionDAG &DAG);
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void EmitSpecialCodeForMain(MachineBasicBlock *BB, MachineFrameInfo *MFI);
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inline void getAddressOperands(X86ISelAddressMode &AM, SDOperand &Base,
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@ -876,6 +882,28 @@ void X86DAGToDAGISel::Select(SDOperand &Result, SDOperand N) {
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#endif
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}
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bool X86DAGToDAGISel::
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SelectInlineAsmMemoryOperand(const SDOperand &Op, char ConstraintCode,
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std::vector<SDOperand> &OutOps, SelectionDAG &DAG){
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SDOperand Op0, Op1, Op2, Op3;
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switch (ConstraintCode) {
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case 'o': // offsetable ??
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case 'v': // not offsetable ??
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default: return true;
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case 'm': // memory
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if (!SelectAddr(Op, Op0, Op1, Op2, Op3))
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return true;
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break;
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}
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OutOps.resize(4);
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Select(OutOps[0], Op0);
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Select(OutOps[1], Op1);
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Select(OutOps[2], Op2);
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Select(OutOps[3], Op3);
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return false;
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}
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/// createX86ISelDag - This pass converts a legalized DAG into a
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/// X86-specific DAG, ready for instruction scheduling.
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///
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