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ARM: use r7 as the frame-pointer on all MachO targets.

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This is better for a few reasons:
  + It matches the other tooling for iOS.
  + It matches EABI in more cases (i.e. Thumb-mode, and in practice we don't
    use ARM mode).
  + It leads to infinitesimally smaller code (0.2%, yay!).

rdar://25369506

llvm-svn: 266003
This commit is contained in:
Tim Northover 2016-04-11 22:27:40 +00:00
parent 003ee915ba
commit 83aa2384f4
5 changed files with 21 additions and 22 deletions
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9
lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@ -49,12 +49,9 @@ ARMBaseRegisterInfo::ARMBaseRegisterInfo()
: ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), BasePtr(ARM::R6) {}
static unsigned getFramePointerReg(const ARMSubtarget &STI) {
if (STI.isTargetMachO()) {
if (STI.isTargetDarwin() || STI.isThumb1Only())
return ARM::R7;
else
return ARM::R11;
} else if (STI.isTargetWindows())
if (STI.isTargetMachO())
return ARM::R7;
else if (STI.isTargetWindows())
return ARM::R11;
else // ARM EABI
return STI.isThumb() ? ARM::R7 : ARM::R11;

14
lib/Target/ARM/ARMFrameLowering.cpp
View File

@ -355,7 +355,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
case ARM::R10:
case ARM::R11:
case ARM::R12:
if (STI.isTargetDarwin()) {
if (STI.isTargetMachO()) {
GPRCS2Size += 4;
break;
}
@ -559,7 +559,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
case ARM::R10:
case ARM::R11:
case ARM::R12:
if (STI.isTargetDarwin())
if (STI.isTargetMachO())
break;
// fallthrough
case ARM::R0:
@ -592,7 +592,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
case ARM::R10:
case ARM::R11:
case ARM::R12:
if (STI.isTargetDarwin()) {
if (STI.isTargetMachO()) {
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
unsigned Offset = MFI->getObjectOffset(FI);
unsigned CFIIndex = MMI.addFrameInst(
@ -904,7 +904,7 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
unsigned LastReg = 0;
for (; i != 0; --i) {
unsigned Reg = CSI[i-1].getReg();
if (!(Func)(Reg, STI.isTargetDarwin())) continue;
if (!(Func)(Reg, STI.isTargetMachO())) continue;
// D-registers in the aligned area DPRCS2 are NOT spilled here.
if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
@ -991,7 +991,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
bool DeleteRet = false;
for (; i != 0; --i) {
unsigned Reg = CSI[i-1].getReg();
if (!(Func)(Reg, STI.isTargetDarwin())) continue;
if (!(Func)(Reg, STI.isTargetMachO())) continue;
// The aligned reloads from area DPRCS2 are not inserted here.
if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
@ -1545,7 +1545,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
if (Spilled) {
NumGPRSpills++;
if (!STI.isTargetDarwin()) {
if (!STI.isTargetMachO()) {
if (Reg == ARM::LR)
LRSpilled = true;
CS1Spilled = true;
@ -1567,7 +1567,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
break;
}
} else {
if (!STI.isTargetDarwin()) {
if (!STI.isTargetMachO()) {
UnspilledCS1GPRs.push_back(Reg);
continue;
}

8
test/CodeGen/ARM/interrupt-attr.ll
View File

@ -35,15 +35,15 @@ define arm_aapcscc void @irq_fn() alignstack(8) "interrupt"="IRQ" {
; Normal AAPCS function (r0-r3 pushed onto stack by hardware, lr set to
; appropriate sentinel so no special return needed).
; CHECK-M-LABEL: irq_fn:
; CHECK-M: push.w {r4, r7, r11, lr}
; CHECK-M: add.w r11, sp, #8
; CHECK-M: push {r4, r6, r7, lr}
; CHECK-M: add r7, sp, #8
; CHECK-M: mov r4, sp
; CHECK-M: bfc r4, #0, #3
; CHECK-M: mov sp, r4
; CHECK-M: bl _bar
; CHECK-M: sub.w r4, r11, #8
; CHECK-M: sub.w r4, r7, #8
; CHECK-M: mov sp, r4
; CHECK-M: pop.w {r4, r7, r11, pc}
; CHECK-M: pop {r4, r6, r7, pc}
call arm_aapcscc void @bar()
ret void

10
test/CodeGen/ARM/none-macho.ll
View File

@ -43,8 +43,8 @@ define i32 @test_frame_ptr() {
; CHECK-LABEL: test_frame_ptr:
call void @test_trap()
; Frame pointer is r11.
; CHECK: mov r11, sp
; Frame pointer is r7.
; CHECK: mov r7, sp
ret i32 42
}
@ -58,9 +58,11 @@ define void @test_two_areas(%big_arr* %addr) {
; This goes with the choice of r7 as FP (largely). FP and LR have to be stored
; consecutively on the stack for the frame record to be valid, which means we
; need the 2 register-save areas employed by iOS.
; CHECK-NON-FAST: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
; CHECK-NON-FAST: push {r4, r5, r6, r7, lr}
; CHECK-NON-FAST: push.w {r8, r9, r10, r11}
; ...
; CHECK-NON-FAST: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
; CHECK-NON-FAST: pop.w {r8, r9, r10, r11}
; CHECK-NON-FAST: pop {r4, r5, r6, r7, pc}
ret void
}

2
test/CodeGen/Thumb2/emit-unwinding.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -mtriple thumbv7em-apple-unknown-eabi-macho %s -o - -O0 | FileCheck %s
; CHECK: add.w r11, sp, #{{[1-9]+}}
; CHECK: add r7, sp, #{{[1-9]+}}
define void @foo1() {
call void asm sideeffect "", "~{r4}"()