diff --git a/test/Transforms/InstCombine/extractelement.ll b/test/Transforms/InstCombine/extractelement.ll index f4043335c4e..7b1ed30e813 100644 --- a/test/Transforms/InstCombine/extractelement.ll +++ b/test/Transforms/InstCombine/extractelement.ll @@ -1,19 +1,95 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt < %s -instcombine -S | FileCheck %s +; RUN: opt < %s -instcombine -S -data-layout="e" | FileCheck %s --check-prefixes=ANY,LE +; RUN: opt < %s -instcombine -S -data-layout="E" | FileCheck %s --check-prefixes=ANY,BE define i32 @extractelement_out_of_range(<2 x i32> %x) { -; CHECK-LABEL: @extractelement_out_of_range( -; CHECK-NEXT: ret i32 undef +; ANY-LABEL: @extractelement_out_of_range( +; ANY-NEXT: ret i32 undef ; %E1 = extractelement <2 x i32> %x, i8 16 ret i32 %E1 } define i32 @extractelement_type_out_of_range(<2 x i32> %x) { -; CHECK-LABEL: @extractelement_type_out_of_range( -; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i128 0 -; CHECK-NEXT: ret i32 [[E1]] +; ANY-LABEL: @extractelement_type_out_of_range( +; ANY-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i128 0 +; ANY-NEXT: ret i32 [[E1]] ; %E1 = extractelement <2 x i32> %x, i128 0 ret i32 %E1 } + +define i32 @bitcasted_inselt_equal_num_elts(float %f) { +; ANY-LABEL: @bitcasted_inselt_equal_num_elts( +; ANY-NEXT: [[R:%.*]] = bitcast float [[F:%.*]] to i32 +; ANY-NEXT: ret i32 [[R]] +; + %vf = insertelement <4 x float> undef, float %f, i32 0 + %vi = bitcast <4 x float> %vf to <4 x i32> + %r = extractelement <4 x i32> %vi, i32 0 + ret i32 %r +} + +define i64 @test2(i64 %in) { +; ANY-LABEL: @test2( +; ANY-NEXT: ret i64 [[IN:%.*]] +; + %vec = insertelement <8 x i64> undef, i64 %in, i32 0 + %splat = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> zeroinitializer + %add = add <8 x i64> %splat, + %r = extractelement <8 x i64> %add, i32 0 + ret i64 %r +} + +define i32 @bitcasted_inselt_wide_source_zero_elt(i64 %x) { +; ANY-LABEL: @bitcasted_inselt_wide_source_zero_elt( +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i64> undef, i64 [[X:%.*]], i32 0 +; ANY-NEXT: [[B:%.*]] = bitcast <2 x i64> [[I]] to <4 x i32> +; ANY-NEXT: [[R:%.*]] = extractelement <4 x i32> [[B]], i32 0 +; ANY-NEXT: ret i32 [[R]] +; + %i = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 + %b = bitcast <2 x i64> %i to <4 x i32> + %r = extractelement <4 x i32> %b, i32 0 + ret i32 %r +} + +define i16 @bitcasted_inselt_wide_source_modulo_elt(i64 %x) { +; ANY-LABEL: @bitcasted_inselt_wide_source_modulo_elt( +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i64> undef, i64 [[X:%.*]], i32 1 +; ANY-NEXT: [[B:%.*]] = bitcast <2 x i64> [[I]] to <8 x i16> +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i32 4 +; ANY-NEXT: ret i16 [[R]] +; + %i = insertelement <2 x i64> undef, i64 %x, i32 1 + %b = bitcast <2 x i64> %i to <8 x i16> + %r = extractelement <8 x i16> %b, i32 4 + ret i16 %r +} + +define i32 @bitcasted_inselt_wide_source_not_modulo_elt(i64 %x) { +; ANY-LABEL: @bitcasted_inselt_wide_source_not_modulo_elt( +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i64> undef, i64 [[X:%.*]], i32 0 +; ANY-NEXT: [[B:%.*]] = bitcast <2 x i64> [[I]] to <4 x i32> +; ANY-NEXT: [[R:%.*]] = extractelement <4 x i32> [[B]], i32 1 +; ANY-NEXT: ret i32 [[R]] +; + %i = insertelement <2 x i64> undef, i64 %x, i32 0 + %b = bitcast <2 x i64> %i to <4 x i32> + %r = extractelement <4 x i32> %b, i32 1 + ret i32 %r +} + +define i8 @bitcasted_inselt_wide_source_not_modulo_elt_not_half(i32 %x) { +; ANY-LABEL: @bitcasted_inselt_wide_source_not_modulo_elt_not_half( +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i32> undef, i32 [[X:%.*]], i32 0 +; ANY-NEXT: [[B:%.*]] = bitcast <2 x i32> [[I]] to <8 x i8> +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i32 2 +; ANY-NEXT: ret i8 [[R]] +; + %i = insertelement <2 x i32> undef, i32 %x, i32 0 + %b = bitcast <2 x i32> %i to <8 x i8> + %r = extractelement <8 x i8> %b, i32 2 + ret i8 %r +} + diff --git a/test/Transforms/InstCombine/vec_extract_elt.ll b/test/Transforms/InstCombine/vec_extract_elt.ll deleted file mode 100644 index 3daf72ede50..00000000000 --- a/test/Transforms/InstCombine/vec_extract_elt.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK-NOT: extractelement - -define i32 @test(float %f) { - %tmp7 = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1] - %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp19 = extractelement <4 x i32> %tmp17, i32 0 ; [#uses=1] - ret i32 %tmp19 -} - -define i64 @test2(i64 %in) { - %vec = insertelement <8 x i64> undef, i64 %in, i32 0 - %splat = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> zeroinitializer - %add = add <8 x i64> %splat, - %scl1 = extractelement <8 x i64> %add, i32 0 - %scl2 = extractelement <8 x i64> %add, i32 0 - %r = add i64 %scl1, %scl2 - ret i64 %r -} -