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Mark the divide instructions as hasSideEffects=0.
llvm-svn: 171136
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@ -266,6 +266,7 @@ def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8
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// unsigned division/remainder
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let hasSideEffects = 0 in {
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let Defs = [AL,EFLAGS,AX], Uses = [AX] in
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def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
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"div{b}\t$src", [], IIC_DIV8_REG>;
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@ -325,6 +326,7 @@ let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in // RDX:RAX/[mem64] = RAX,RDX
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def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
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"idiv{q}\t$src", [], IIC_IDIV64>;
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}
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} // hasSideEffects = 0
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//===----------------------------------------------------------------------===//
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// Two address Instructions.
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