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[TargetLowering] Extend bool args to inline-asm according to getBooleanType

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Summary:
This extends Krzysztof Parzyszek's X86-specific solution
(https://reviews.llvm.org/D60208) to the generic code pointed out by
James Y Knight.

Reviewers: kparzysz, craig.topper, nickdesaulniers

Subscribers: efriedma, sdardis, nemanjai, javed.absar, eraman, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, srhines, void, nickdesaulniers, jyknight

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60224

llvm-svn: 361404
This commit is contained in:
Kees Cook 2019-05-22 16:16:15 +00:00
parent 9848676b61
commit 845a6c28c5
10 changed files with 136 additions and 1 deletions
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11
lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -3562,7 +3562,16 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
return;
} else if ((C = dyn_cast<ConstantSDNode>(Op)) &&
ConstraintLetter != 's') {
Ops.push_back(DAG.getTargetConstant(Offset + C->getSExtValue(),
// gcc prints these as sign extended. Sign extend value to 64 bits
// now; without this it would get ZExt'd later in
// ScheduleDAGSDNodes::EmitNode, which is very generic.
bool IsBool = C->getConstantIntValue()->getBitWidth() == 1;
BooleanContent BCont = getBooleanContents(MVT::i64);
ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont)
: ISD::SIGN_EXTEND;
int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? C->getZExtValue()
: C->getSExtValue();
Ops.push_back(DAG.getTargetConstant(Offset + ExtVal,
SDLoc(C), MVT::i64));
return;
} else {

14
test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "aarch64-unknown-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/ARM/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=armv7-unknown-linux-gnueabi < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "armv7-unknown-linux-gnueabi"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/Mips/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=mips64el-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "mips64el-unknown-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "powerpc64le-unknown-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "riscv64-unknown-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=sparc64-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "sparc64-unknown-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=s390x-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "s390x-linux-gnu"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=thumbv7-linux-gnueabi < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "thumbv7-linux-gnueabi"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }

14
test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc -mtriple=thumbv8-none-linux-gnueabi < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: TEST 42 + 1 - .
target triple = "thumbv8-none-linux-gnueabi"
define i32 @foo() #0 {
entry:
tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
ret i32 1
}
attributes #0 = { nounwind }