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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00

Remove extraneous 64-bit argument to the PPC TargetMachine constructor

and update initialization.

llvm-svn: 215280
This commit is contained in:
Eric Christopher 2014-08-09 04:38:56 +00:00
parent d181d98332
commit 846e6d954c
4 changed files with 13 additions and 11 deletions

View File

@ -76,8 +76,10 @@ PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, PPCTargetMachine &TM,
bool is64Bit, CodeGenOpt::Level OptLevel)
: PPCGenSubtargetInfo(TT, CPU, FS), IsPPC64(is64Bit), TargetTriple(TT),
CodeGenOpt::Level OptLevel)
: PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
TargetTriple.getArch() == Triple::ppc64le),
OptLevel(OptLevel), TargetABI(PPC_ABI_UNKNOWN),
FrameLowering(initializeSubtargetDependencies(CPU, FS)),
DL(getDataLayoutString(*this)), InstrInfo(*this), JITInfo(*this),

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@ -66,6 +66,9 @@ class TargetMachine;
class PPCSubtarget : public PPCGenSubtargetInfo {
protected:
/// TargetTriple - What processor and OS we're targeting.
Triple TargetTriple;
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned StackAlignment;
@ -107,9 +110,6 @@ protected:
bool IsJITCodeModel;
bool IsLittleEndian;
/// TargetTriple - What processor and OS we're targeting.
Triple TargetTriple;
/// OptLevel - What default optimization level we're emitting code for.
CodeGenOpt::Level OptLevel;
@ -131,7 +131,7 @@ public:
/// of the specified triple.
///
PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, PPCTargetMachine &TM, bool is64Bit,
const std::string &FS, PPCTargetMachine &TM,
CodeGenOpt::Level OptLevel);
/// ParseSubtargetFeatures - Parses features string setting specified

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@ -40,9 +40,9 @@ extern "C" void LLVMInitializePowerPCTarget() {
PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool is64Bit)
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, *this, is64Bit, OL) {
Subtarget(TT, CPU, FS, *this, OL) {
initAsmInfo();
}
@ -53,7 +53,7 @@ PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
}
void PPC64TargetMachine::anchor() { }
@ -63,7 +63,7 @@ PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
}

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@ -30,7 +30,7 @@ public:
PPCTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool is64Bit);
CodeGenOpt::Level OL);
const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }