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[DAG, X86] Fix ISel-time node insertion ids
As in SystemZ backend, correctly propagate node ids when inserting new unselected nodes into the DAG during instruction Seleciton for X86 target. Fixes PR36865. Reviewers: jyknight, craig.topper Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D44797 llvm-svn: 328233
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@ -110,6 +110,9 @@ public:
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CodeGenOpt::Level OptLevel,
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bool IgnoreChains = false);
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static void InvalidateNodeId(SDNode *N);
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static int getUninvalidatedNodeId(SDNode *N);
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static void EnforceNodeIdInvariant(SDNode *N);
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// Opcodes used by the DAG state machine:
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@ -989,14 +989,29 @@ void SelectionDAGISel::EnforceNodeIdInvariant(SDNode *Node) {
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for (auto *U : N->uses()) {
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auto UId = U->getNodeId();
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if (UId > 0) {
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int InvalidatedUId = -UId + 1;
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U->setNodeId(InvalidatedUId);
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InvalidateNodeId(U);
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Nodes.push_back(U);
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}
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}
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}
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}
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// InvalidateNodeId - As discusses in EnforceNodeIdInvariant, mark a
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// NodeId with the equivalent node id which is invalid for topological
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// pruning.
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void SelectionDAGISel::InvalidateNodeId(SDNode *N) {
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int InvalidId = -N->getNodeId() + 1;
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N->setNodeId(InvalidId);
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}
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// getUninvalidatedNodeId - get original uninvalidated node id.
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int SelectionDAGISel::getUninvalidatedNodeId(SDNode *N) {
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int Id = N->getNodeId();
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if (Id < 0)
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return -Id + 1;
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return Id;
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}
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void SelectionDAGISel::DoInstructionSelection() {
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DEBUG(dbgs() << "===== Instruction selection begins: "
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<< printMBBReference(*FuncInfo->MBB) << " '"
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@ -593,16 +593,16 @@ bool SystemZDAGToDAGISel::selectAddress(SDValue Addr,
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// The selection DAG must no longer depend on their uniqueness when this
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// function is used.
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static void insertDAGNode(SelectionDAG *DAG, SDNode *Pos, SDValue N) {
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if (N.getNode()->getNodeId() == -1 ||
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N.getNode()->getNodeId() > Pos->getNodeId()) {
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if (N->getNodeId() == -1 ||
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(SelectionDAGISel::getUninvalidatedNodeId(N.getNode()) >
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SelectionDAGISel::getUninvalidatedNodeId(Pos))) {
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DAG->RepositionNode(Pos->getIterator(), N.getNode());
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// Mark Node as invalid for pruning as after this it may be a successor to a
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// selected node but otherwise be in the same position of Pos.
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// Conservatively mark it with the same -abs(Id) to assure node id
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// invariant is preserved.
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int PId = Pos->getNodeId();
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int InvalidatedPId = -(PId + 1);
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N->setNodeId((PId > 0) ? InvalidatedPId : PId);
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N->setNodeId(Pos->getNodeId());
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SelectionDAGISel::InvalidateNodeId(N.getNode());
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}
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}
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@ -1070,10 +1070,16 @@ bool X86DAGToDAGISel::matchAdd(SDValue N, X86ISelAddressMode &AM,
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// IDs! The selection DAG must no longer depend on their uniqueness when this
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// is used.
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static void insertDAGNode(SelectionDAG &DAG, SDValue Pos, SDValue N) {
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if (N.getNode()->getNodeId() == -1 ||
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N.getNode()->getNodeId() > Pos.getNode()->getNodeId()) {
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DAG.RepositionNode(Pos.getNode()->getIterator(), N.getNode());
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N.getNode()->setNodeId(Pos.getNode()->getNodeId());
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if (N->getNodeId() == -1 ||
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(SelectionDAGISel::getUninvalidatedNodeId(N.getNode()) >
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SelectionDAGISel::getUninvalidatedNodeId(Pos.getNode()))) {
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DAG.RepositionNode(Pos->getIterator(), N.getNode());
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// Mark Node as invalid for pruning as after this it may be a successor to a
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// selected node but otherwise be in the same position of Pos.
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// Conservatively mark it with the same -abs(Id) to assure node id
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// invariant is preserved.
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N->setNodeId(Pos->getNodeId());
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SelectionDAGISel::InvalidateNodeId(N.getNode());
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}
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}
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63
test/CodeGen/X86/pr36865.ll
Normal file
63
test/CodeGen/X86/pr36865.ll
Normal file
@ -0,0 +1,63 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
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define void @main() {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subq $424, %rsp # imm = 0x1A8
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; CHECK-NEXT: .cfi_def_cfa_offset 432
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; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rdi
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; CHECK-NEXT: xorl %esi, %esi
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; CHECK-NEXT: movl $400, %edx # imm = 0x190
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; CHECK-NEXT: callq memset
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; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: movl (%rax), %ecx
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; CHECK-NEXT: addl 0, %eax
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: imull %eax, %ecx
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; CHECK-NEXT: subl %ecx, %eax
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; CHECK-NEXT: movl %eax, (%rax)
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entry:
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%k = alloca i32, align 4
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%m = alloca i32, align 4
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%a = alloca [100 x i32], align 16
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%0 = bitcast [100 x i32]* %a to i8*
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call void @llvm.memset.p0i8.i64(i8* nonnull align 16 %0, i8 0, i64 400, i1 false)
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%arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* %a, i64 0, i64 34
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%add = load i32, i32* %k
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%1 = load i32, i32* null
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%2 = load i32, i32* undef
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%3 = load i32, i32* undef
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%4 = load i32, i32* %arrayidx
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%5 = load i32, i32* undef
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%6 = load i32, i32* undef
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%7 = load i32, i32* undef
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%8 = load i32, i32* undef
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%9 = load i32, i32* undef
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%10 = load i32, i32* undef
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%11 = load i32, i32* undef
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%12 = load i32, i32* undef
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%13 = load i32, i32* undef
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%14 = load i32, i32* undef
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%15 = load i32, i32* undef
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%16 = load i32, i32* undef
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%add.1 = add i32 %add, %1
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%add.2 = add i32 %add.1, %2
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%add.3 = add i32 %add.2, %3
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%add.4 = add i32 %add.3, %4
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store i32 %add.4, i32* %k
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%17 = load i32, i32* %m
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%mul = mul i32 %17, %17
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%sub = sub i32 %17, %mul
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store i32 %sub, i32* undef
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unreachable
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1) #0
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attributes #0 = { argmemonly nounwind }
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