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Refactor SSE cmp intrinsics and declare the same for AVX
llvm-svn: 106796
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@ -738,6 +738,35 @@ let Constraints = "$src1 = $dst", neverHasSideEffects = 1 in {
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"cmpsd\t{$src2, $src, $dst|$dst, $src, $src2}">, XD;
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}
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multiclass sse12_cmp_scalar_int<RegisterClass RC, X86MemOperand x86memop,
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Intrinsic Int, string asm> {
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def rr : SIi8<0xC2, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src, SSECC:$cc), asm,
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[(set VR128:$dst, (Int VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def rm : SIi8<0xC2, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, f32mem:$src, SSECC:$cc), asm,
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[(set VR128:$dst, (Int VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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}
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// Aliases to match intrinsics which expect XMM operand(s).
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let isAsmParserOnly = 1 in {
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defm Int_VCMPSS : sse12_cmp_scalar_int<VR128, f32mem, int_x86_sse_cmp_ss,
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"cmp${cc}ss\t{$src, $src1, $dst|$dst, $src1, $src}">,
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XS, VEX_4V;
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defm Int_VCMPSD : sse12_cmp_scalar_int<VR128, f64mem, int_x86_sse2_cmp_sd,
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"cmp${cc}sd\t{$src, $src1, $dst|$dst, $src1, $src}">,
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XD, VEX_4V;
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}
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let Constraints = "$src1 = $dst" in {
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defm Int_CMPSS : sse12_cmp_scalar_int<VR128, f32mem, int_x86_sse_cmp_ss,
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"cmp${cc}ss\t{$src, $dst|$dst, $src}">, XS;
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defm Int_CMPSD : sse12_cmp_scalar_int<VR128, f64mem, int_x86_sse2_cmp_sd,
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"cmp${cc}sd\t{$src, $dst|$dst, $src}">, XD;
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}
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// sse12_ord_cmp - Unordered/Ordered scalar fp compare and set EFLAGS
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multiclass sse12_ord_cmp<bits<8> opc, RegisterClass RC, SDNode OpNode,
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ValueType vt, X86MemOperand x86memop,
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@ -797,36 +826,6 @@ let Defs = [EFLAGS] in {
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"comisd", SSEPackedDouble>, TB, OpSize;
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} // Defs = [EFLAGS]
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// Aliases to match intrinsics which expect XMM operand(s).
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let Constraints = "$src1 = $dst" in {
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def Int_CMPSSrr : SSIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst),
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(ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ss\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ss
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VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def Int_CMPSSrm : SSIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst),
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(ins VR128:$src1, f32mem:$src, SSECC:$cc),
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"cmp${cc}ss\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst),
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(ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}sd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def Int_CMPSDrm : SDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst),
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(ins VR128:$src1, f64mem:$src, SSECC:$cc),
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"cmp${cc}sd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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}
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// sse12_cmp_packed - sse 1 & 2 compared packed instructions
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multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,
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Intrinsic Int, string asm, string asm_alt,
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