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For ARM disassembly only print 32 unsigned bits for the address of branch

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targets so if the branch target has the high bit set it does not get printed as:
	 beq     0xffffffff8008c404

llvm-svn: 154685
This commit is contained in:
Kevin Enderby 2012-04-13 18:46:37 +00:00
parent d5743c7fd0
commit 84e97c7df2
1 changed files with 2 additions and 2 deletions
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4
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
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@ -209,12 +209,12 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
} else { } else {
assert(Op.isExpr() && "unknown operand kind in printOperand"); assert(Op.isExpr() && "unknown operand kind in printOperand");
// If a symbolic branch target was added as a constant expression then print // If a symbolic branch target was added as a constant expression then print
// that address in hex. // that address in hex. And only print 32 unsigned bits for the address.
const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr()); const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
int64_t Address; int64_t Address;
if (BranchTarget && BranchTarget->EvaluateAsAbsolute(Address)) { if (BranchTarget && BranchTarget->EvaluateAsAbsolute(Address)) {
O << "0x"; O << "0x";
O.write_hex(Address); O.write_hex((uint32_t)Address);
} }
else { else {
// Otherwise, just print the expression. // Otherwise, just print the expression.