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For ARM disassembly only print 32 unsigned bits for the address of branch
targets so if the branch target has the high bit set it does not get printed as: beq 0xffffffff8008c404 llvm-svn: 154685
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@ -209,12 +209,12 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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} else {
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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// If a symbolic branch target was added as a constant expression then print
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// that address in hex.
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// that address in hex. And only print 32 unsigned bits for the address.
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const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
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int64_t Address;
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if (BranchTarget && BranchTarget->EvaluateAsAbsolute(Address)) {
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O << "0x";
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O.write_hex(Address);
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O.write_hex((uint32_t)Address);
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}
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else {
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// Otherwise, just print the expression.
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