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Although we already support this, add testcases for consistency

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llvm-svn: 135728
This commit is contained in:
Bruno Cardoso Lopes 2011-07-22 00:15:03 +00:00
parent 1ee6122518
commit 85357a460f
1 changed files with 21 additions and 0 deletions
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21
test/CodeGen/X86/avx-cast.ll
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@ -24,3 +24,24 @@ entry:
ret <4 x i64> %shuffle.i
}
; CHECK: vextractf128 $0
define <4 x float> @castD(<8 x float> %m) nounwind uwtable readnone ssp {
entry:
%shuffle.i = shufflevector <8 x float> %m, <8 x float> %m, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x float> %shuffle.i
}
; CHECK: vextractf128 $0
define <2 x i64> @castE(<4 x i64> %m) nounwind uwtable readnone ssp {
entry:
%shuffle.i = shufflevector <4 x i64> %m, <4 x i64> %m, <2 x i32> <i32 0, i32 1>
ret <2 x i64> %shuffle.i
}
; CHECK: vextractf128 $0
define <2 x double> @castF(<4 x double> %m) nounwind uwtable readnone ssp {
entry:
%shuffle.i = shufflevector <4 x double> %m, <4 x double> %m, <2 x i32> <i32 0, i32 1>
ret <2 x double> %shuffle.i
}