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AMDGPU: Uniform branch conditions can originate with intrinsics

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Summary:
Discovered by Dave Airlie, fixes an assertion in Khronos OpenGL CTS
GL43-CTS.shader_storage_buffer_object.advanced-matrix.

In this particular case, the buffer load intrinsic fed into a uniform
conditional branch, and led the brcond lowering down the wrong path.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19931

llvm-svn: 268650
This commit is contained in:
Nicolai Haehnle 2016-05-05 17:36:36 +00:00
parent 0d89e9527b
commit 854cd758f6
2 changed files with 28 additions and 2 deletions
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3
lib/Target/AMDGPU/SIISelLowering.cpp
View File

@ -1356,14 +1356,13 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
Target = BR->getOperand(1);
}
if (Intr->getOpcode() != ISD::INTRINSIC_W_CHAIN) {
if (!isCFIntrinsic(Intr)) {
// This is a uniform branch so we don't need to legalize.
return BRCOND;
}
assert(!SetCC ||
(SetCC->getConstantOperandVal(1) == 1 &&
isCFIntrinsic(Intr) &&
cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
ISD::SETNE));

27
test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll Normal file
View File

@ -0,0 +1,27 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; This used to raise an assertion due to how the choice between uniform and
; non-uniform branches was determined.
;
; CHECK-LABEL: {{^}}main:
; CHECK: s_cbranch_vccnz
define amdgpu_ps float @main(<4 x i32> inreg %rsrc) {
main_body:
%v = call float @llvm.amdgcn.buffer.load.f32(<4 x i32> %rsrc, i32 0, i32 0, i1 true, i1 false)
%cc = fcmp une float %v, 1.000000e+00
br i1 %cc, label %if, label %else
if:
%u = fadd float %v, %v
br label %else
else:
%r = phi float [ %v, %main_body ], [ %u, %if ]
ret float %r
}
; Function Attrs: nounwind readonly
declare float @llvm.amdgcn.buffer.load.f32(<4 x i32>, i32, i32, i1, i1) #0
attributes #0 = { nounwind readonly }