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[WebAssembly] Support for atomic.wait / atomic.wake instructions
Summary: This adds support for atomic.wait / atomic.wake instructions in the wasm thread proposal. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49395 llvm-svn: 338770
This commit is contained in:
Heejin Ahn
parent
67370a2e75
commit
855cdeda11
@ -64,4 +64,27 @@ def int_wasm_landingpad_index: Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>;
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// Returns LSDA address of the current function.
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def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
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//===----------------------------------------------------------------------===//
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// Atomic intrinsics
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//===----------------------------------------------------------------------===//
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// wait / notify
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def int_wasm_atomic_wait_i32 :
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Intrinsic<[llvm_i32_ty],
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[LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
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[IntrInaccessibleMemOrArgMemOnly, ReadOnly<0>, NoCapture<0>,
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IntrHasSideEffects],
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"", [SDNPMemOperand]>;
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def int_wasm_atomic_wait_i64 :
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Intrinsic<[llvm_i32_ty],
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[LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
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[IntrInaccessibleMemOrArgMemOnly, ReadOnly<0>, NoCapture<0>,
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IntrHasSideEffects],
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"", [SDNPMemOperand]>;
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def int_wasm_atomic_notify:
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Intrinsic<[llvm_i64_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i64_ty],
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[IntrInaccessibleMemOnly, NoCapture<0>, IntrHasSideEffects], "",
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[SDNPMemOperand]>;
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}
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@ -253,6 +253,10 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) {
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case WebAssembly::ATOMIC_RMW_CMPXCHG_I32_S:
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case WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64:
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case WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64_S:
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case WebAssembly::ATOMIC_NOTIFY:
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case WebAssembly::ATOMIC_NOTIFY_S:
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case WebAssembly::ATOMIC_WAIT_I32:
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case WebAssembly::ATOMIC_WAIT_I32_S:
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return 2;
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case WebAssembly::LOAD_I64:
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case WebAssembly::LOAD_I64_S:
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@ -280,6 +284,8 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) {
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case WebAssembly::ATOMIC_RMW_XCHG_I64_S:
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case WebAssembly::ATOMIC_RMW_CMPXCHG_I64:
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case WebAssembly::ATOMIC_RMW_CMPXCHG_I64_S:
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case WebAssembly::ATOMIC_WAIT_I64:
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case WebAssembly::ATOMIC_WAIT_I64_S:
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return 3;
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default:
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llvm_unreachable("Only loads and stores have p2align values");
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@ -438,6 +438,46 @@ EVT WebAssemblyTargetLowering::getSetCCResultType(const DataLayout &DL,
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return TargetLowering::getSetCCResultType(DL, C, VT);
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}
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bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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switch (Intrinsic) {
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case Intrinsic::wasm_atomic_notify:
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Info.opc = ISD::INTRINSIC_W_CHAIN;
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Info.memVT = MVT::i32;
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Info.ptrVal = I.getArgOperand(0);
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Info.offset = 0;
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Info.align = 4;
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// atomic.notify instruction does not really load the memory specified with
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// this argument, but MachineMemOperand should either be load or store, so
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// we set this to a load.
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// FIXME Volatile isn't really correct, but currently all LLVM atomic
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// instructions are treated as volatiles in the backend, so we should be
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// consistent. The same applies for wasm_atomic_wait intrinsics too.
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Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
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return true;
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case Intrinsic::wasm_atomic_wait_i32:
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Info.opc = ISD::INTRINSIC_W_CHAIN;
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Info.memVT = MVT::i32;
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Info.ptrVal = I.getArgOperand(0);
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Info.offset = 0;
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Info.align = 4;
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Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
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return true;
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case Intrinsic::wasm_atomic_wait_i64:
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Info.opc = ISD::INTRINSIC_W_CHAIN;
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Info.memVT = MVT::i64;
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Info.ptrVal = I.getArgOperand(0);
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Info.offset = 0;
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Info.align = 8;
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Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
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return true;
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default:
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return false;
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}
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}
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//===----------------------------------------------------------------------===//
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// WebAssembly Lowering private implementation.
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//===----------------------------------------------------------------------===//
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@ -66,6 +66,9 @@ class WebAssemblyTargetLowering final : public TargetLowering {
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EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
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EVT VT) const override;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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SDValue LowerCall(CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const override;
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@ -897,4 +897,130 @@ defm : TerRMWTruncExtPattern<
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ATOMIC_RMW8_U_CMPXCHG_I32, ATOMIC_RMW16_U_CMPXCHG_I32,
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ATOMIC_RMW8_U_CMPXCHG_I64, ATOMIC_RMW16_U_CMPXCHG_I64,
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ATOMIC_RMW32_U_CMPXCHG_I64>;
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}
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//===----------------------------------------------------------------------===//
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// Atomic wait / notify
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//===----------------------------------------------------------------------===//
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let Defs = [ARGUMENTS] in {
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let hasSideEffects = 1 in {
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defm ATOMIC_NOTIFY :
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I<(outs I64:$dst),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$count),
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(outs), (ins P2Align:$p2align, offset32_op:$off), [],
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"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
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"atomic.notify \t${off}, ${p2align}", 0xfe00>;
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let mayLoad = 1 in {
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defm ATOMIC_WAIT_I32 :
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I<(outs I32:$dst),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$exp, I64:$timeout),
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(outs), (ins P2Align:$p2align, offset32_op:$off), [],
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"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
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"i32.atomic.wait \t${off}, ${p2align}", 0xfe01>;
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defm ATOMIC_WAIT_I64 :
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I<(outs I32:$dst),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp, I64:$timeout),
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(outs), (ins P2Align:$p2align, offset32_op:$off), [],
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"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
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"i64.atomic.wait \t${off}, ${p2align}", 0xfe02>;
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} // mayLoad = 1
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} // hasSideEffects = 1
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} // Defs = [ARGUMENTS]
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let Predicates = [HasAtomics] in {
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// Select notifys with no constant offset.
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class NotifyPatNoOffset<Intrinsic kind> :
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Pat<(i64 (kind I32:$addr, I64:$count)),
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(ATOMIC_NOTIFY 0, 0, I32:$addr, I64:$count)>;
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def : NotifyPatNoOffset<int_wasm_atomic_notify>;
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// Select notifys with a constant offset.
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// Pattern with address + immediate offset
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class NotifyPatImmOff<Intrinsic kind, PatFrag operand> :
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Pat<(i64 (kind (operand I32:$addr, imm:$off), I64:$count)),
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(ATOMIC_NOTIFY 0, imm:$off, I32:$addr, I64:$count)>;
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def : NotifyPatImmOff<int_wasm_atomic_notify, regPlusImm>;
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def : NotifyPatImmOff<int_wasm_atomic_notify, or_is_add>;
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class NotifyPatGlobalAddr<Intrinsic kind> :
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Pat<(i64 (kind (regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off)),
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I64:$count)),
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(ATOMIC_NOTIFY 0, tglobaladdr:$off, I32:$addr, I64:$count)>;
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def : NotifyPatGlobalAddr<int_wasm_atomic_notify>;
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class NotifyPatExternalSym<Intrinsic kind> :
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Pat<(i64 (kind (add I32:$addr, (WebAssemblywrapper texternalsym:$off)),
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I64:$count)),
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(ATOMIC_NOTIFY 0, texternalsym:$off, I32:$addr, I64:$count)>;
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def : NotifyPatExternalSym<int_wasm_atomic_notify>;
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// Select notifys with just a constant offset.
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class NotifyPatOffsetOnly<Intrinsic kind> :
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Pat<(i64 (kind imm:$off, I64:$count)),
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(ATOMIC_NOTIFY 0, imm:$off, (CONST_I32 0), I64:$count)>;
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def : NotifyPatOffsetOnly<int_wasm_atomic_notify>;
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class NotifyPatGlobalAddrOffOnly<Intrinsic kind> :
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Pat<(i64 (kind (WebAssemblywrapper tglobaladdr:$off), I64:$count)),
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(ATOMIC_NOTIFY 0, tglobaladdr:$off, (CONST_I32 0), I64:$count)>;
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def : NotifyPatGlobalAddrOffOnly<int_wasm_atomic_notify>;
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class NotifyPatExternSymOffOnly<Intrinsic kind> :
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Pat<(i64 (kind (WebAssemblywrapper texternalsym:$off), I64:$count)),
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(ATOMIC_NOTIFY 0, texternalsym:$off, (CONST_I32 0), I64:$count)>;
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def : NotifyPatExternSymOffOnly<int_wasm_atomic_notify>;
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// Select waits with no constant offset.
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class WaitPatNoOffset<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind I32:$addr, ty:$exp, I64:$timeout)),
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(inst 0, 0, I32:$addr, ty:$exp, I64:$timeout)>;
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def : WaitPatNoOffset<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatNoOffset<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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// Select waits with a constant offset.
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// Pattern with address + immediate offset
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class WaitPatImmOff<ValueType ty, Intrinsic kind, PatFrag operand, NI inst> :
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Pat<(i32 (kind (operand I32:$addr, imm:$off), ty:$exp, I64:$timeout)),
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(inst 0, imm:$off, I32:$addr, ty:$exp, I64:$timeout)>;
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def : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, regPlusImm, ATOMIC_WAIT_I32>;
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def : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, or_is_add, ATOMIC_WAIT_I32>;
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def : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, regPlusImm, ATOMIC_WAIT_I64>;
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def : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, or_is_add, ATOMIC_WAIT_I64>;
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class WaitPatGlobalAddr<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind (regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off)),
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ty:$exp, I64:$timeout)),
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(inst 0, tglobaladdr:$off, I32:$addr, ty:$exp, I64:$timeout)>;
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def : WaitPatGlobalAddr<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatGlobalAddr<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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class WaitPatExternalSym<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind (add I32:$addr, (WebAssemblywrapper texternalsym:$off)),
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ty:$exp, I64:$timeout)),
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(inst 0, texternalsym:$off, I32:$addr, ty:$exp, I64:$timeout)>;
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def : WaitPatExternalSym<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatExternalSym<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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// Select wait_i32, ATOMIC_WAIT_I32s with just a constant offset.
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class WaitPatOffsetOnly<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind imm:$off, ty:$exp, I64:$timeout)),
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(inst 0, imm:$off, (CONST_I32 0), ty:$exp, I64:$timeout)>;
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def : WaitPatOffsetOnly<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatOffsetOnly<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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class WaitPatGlobalAddrOffOnly<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind (WebAssemblywrapper tglobaladdr:$off), ty:$exp, I64:$timeout)),
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(inst 0, tglobaladdr:$off, (CONST_I32 0), ty:$exp, I64:$timeout)>;
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def : WaitPatGlobalAddrOffOnly<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatGlobalAddrOffOnly<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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class WaitPatExternSymOffOnly<ValueType ty, Intrinsic kind, NI inst> :
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Pat<(i32 (kind (WebAssemblywrapper texternalsym:$off), ty:$exp,
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I64:$timeout)),
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(inst 0, texternalsym:$off, (CONST_I32 0), ty:$exp, I64:$timeout)>;
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def : WaitPatExternSymOffOnly<i32, int_wasm_atomic_wait_i32, ATOMIC_WAIT_I32>;
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def : WaitPatExternSymOffOnly<i64, int_wasm_atomic_wait_i64, ATOMIC_WAIT_I64>;
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} // Predicates = [HasAtomics]
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@ -156,6 +156,9 @@ bool WebAssemblySetP2AlignOperands::runOnMachineFunction(MachineFunction &MF) {
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case WebAssembly::ATOMIC_RMW_XOR_I64:
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case WebAssembly::ATOMIC_RMW_XCHG_I64:
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case WebAssembly::ATOMIC_RMW_CMPXCHG_I64:
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case WebAssembly::ATOMIC_NOTIFY:
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case WebAssembly::ATOMIC_WAIT_I32:
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case WebAssembly::ATOMIC_WAIT_I64:
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RewriteP2Align(MI, WebAssembly::LoadP2AlignOperandNo);
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break;
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case WebAssembly::STORE_I32:
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@ -1525,3 +1525,269 @@ define i32 @cmpxchg_i8_i32_z_from_global_address(i32 %exp, i32 %new) {
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%u = zext i8 %old to i32
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ret i32 %u
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}
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;===----------------------------------------------------------------------------
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; Waits: 32-bit
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;===----------------------------------------------------------------------------
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declare i32 @llvm.wasm.atomic.wait.i32(i32*, i32, i64)
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; Basic wait.
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; CHECK-LABEL: wait_i32_no_offset:
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; CHECK: i32.atomic.wait $push0=, 0($0), $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @wait_i32_no_offset(i32* %p, i32 %exp, i64 %timeout) {
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%v = call i32 @llvm.wasm.atomic.wait.i32(i32* %p, i32 %exp, i64 %timeout)
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ret i32 %v
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}
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; With an nuw add, we can fold an offset.
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; CHECK-LABEL: wait_i32_with_folded_offset:
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; CHECK: i32.atomic.wait $push0=, 24($0), $1, $2{{$}}
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define i32 @wait_i32_with_folded_offset(i32* %p, i32 %exp, i64 %timeout) {
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%q = ptrtoint i32* %p to i32
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%r = add nuw i32 %q, 24
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%s = inttoptr i32 %r to i32*
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; With an inbounds gep, we can fold an offset.
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; CHECK-LABEL: wait_i32_with_folded_gep_offset:
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; CHECK: i32.atomic.wait $push0=, 24($0), $1, $2{{$}}
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define i32 @wait_i32_with_folded_gep_offset(i32* %p, i32 %exp, i64 %timeout) {
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%s = getelementptr inbounds i32, i32* %p, i32 6
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; We can't fold a negative offset though, even with an inbounds gep.
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; CHECK-LABEL: wait_i32_with_unfolded_gep_negative_offset:
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; CHECK: i32.const $push0=, -24{{$}}
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; CHECK: i32.add $push1=, $0, $pop0{{$}}
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; CHECK: i32.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
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define i32 @wait_i32_with_unfolded_gep_negative_offset(i32* %p, i32 %exp, i64 %timeout) {
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%s = getelementptr inbounds i32, i32* %p, i32 -6
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; Without nuw, and even with nsw, we can't fold an offset.
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; CHECK-LABEL: wait_i32_with_unfolded_offset:
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; CHECK: i32.const $push0=, 24{{$}}
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; CHECK: i32.add $push1=, $0, $pop0{{$}}
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; CHECK: i32.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
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define i32 @wait_i32_with_unfolded_offset(i32* %p, i32 %exp, i64 %timeout) {
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%q = ptrtoint i32* %p to i32
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%r = add nsw i32 %q, 24
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%s = inttoptr i32 %r to i32*
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; Without inbounds, we can't fold a gep offset.
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; CHECK-LABEL: wait_i32_with_unfolded_gep_offset:
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; CHECK: i32.const $push0=, 24{{$}}
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; CHECK: i32.add $push1=, $0, $pop0{{$}}
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; CHECK: i32.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
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define i32 @wait_i32_with_unfolded_gep_offset(i32* %p, i32 %exp, i64 %timeout) {
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%s = getelementptr i32, i32* %p, i32 6
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; When waiting from a fixed address, materialize a zero.
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; CHECK-LABEL: wait_i32_from_numeric_address
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; CHECK: i32.const $push0=, 0{{$}}
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; CHECK: i32.atomic.wait $push1=, 42($pop0), $0, $1{{$}}
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define i32 @wait_i32_from_numeric_address(i32 %exp, i64 %timeout) {
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%s = inttoptr i32 42 to i32*
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%t = call i32 @llvm.wasm.atomic.wait.i32(i32* %s, i32 %exp, i64 %timeout)
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ret i32 %t
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}
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; CHECK-LABEL: wait_i32_from_global_address
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||||
; CHECK: i32.const $push0=, 0{{$}}
|
||||
; CHECK: i32.atomic.wait $push1=, gv($pop0), $0, $1{{$}}
|
||||
define i32 @wait_i32_from_global_address(i32 %exp, i64 %timeout) {
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i32(i32* @gv, i32 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
;===----------------------------------------------------------------------------
|
||||
; Waits: 64-bit
|
||||
;===----------------------------------------------------------------------------
|
||||
|
||||
declare i32 @llvm.wasm.atomic.wait.i64(i64*, i64, i64)
|
||||
|
||||
; Basic wait.
|
||||
|
||||
; CHECK-LABEL: wait_i64_no_offset:
|
||||
; CHECK: i64.atomic.wait $push0=, 0($0), $1, $2{{$}}
|
||||
; CHECK-NEXT: return $pop0{{$}}
|
||||
define i32 @wait_i64_no_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%v = call i32 @llvm.wasm.atomic.wait.i64(i64* %p, i64 %exp, i64 %timeout)
|
||||
ret i32 %v
|
||||
}
|
||||
|
||||
; With an nuw add, we can fold an offset.
|
||||
|
||||
; CHECK-LABEL: wait_i64_with_folded_offset:
|
||||
; CHECK: i64.atomic.wait $push0=, 24($0), $1, $2{{$}}
|
||||
define i32 @wait_i64_with_folded_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%q = ptrtoint i64* %p to i32
|
||||
%r = add nuw i32 %q, 24
|
||||
%s = inttoptr i32 %r to i64*
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i64(i64* %s, i64 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
; With an inbounds gep, we can fold an offset.
|
||||
|
||||
; CHECK-LABEL: wait_i64_with_folded_gep_offset:
|
||||
; CHECK: i64.atomic.wait $push0=, 24($0), $1, $2{{$}}
|
||||
define i32 @wait_i64_with_folded_gep_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%s = getelementptr inbounds i64, i64* %p, i32 3
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i64(i64* %s, i64 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
; We can't fold a negative offset though, even with an inbounds gep.
|
||||
|
||||
; CHECK-LABEL: wait_i64_with_unfolded_gep_negative_offset:
|
||||
; CHECK: i32.const $push0=, -24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: i64.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
|
||||
define i32 @wait_i64_with_unfolded_gep_negative_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%s = getelementptr inbounds i64, i64* %p, i32 -3
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i64(i64* %s, i64 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
; Without nuw, and even with nsw, we can't fold an offset.
|
||||
|
||||
; CHECK-LABEL: wait_i64_with_unfolded_offset:
|
||||
; CHECK: i32.const $push0=, 24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: i64.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
|
||||
define i32 @wait_i64_with_unfolded_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%q = ptrtoint i64* %p to i32
|
||||
%r = add nsw i32 %q, 24
|
||||
%s = inttoptr i32 %r to i64*
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i64(i64* %s, i64 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
; Without inbounds, we can't fold a gep offset.
|
||||
|
||||
; CHECK-LABEL: wait_i64_with_unfolded_gep_offset:
|
||||
; CHECK: i32.const $push0=, 24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: i64.atomic.wait $push2=, 0($pop1), $1, $2{{$}}
|
||||
define i32 @wait_i64_with_unfolded_gep_offset(i64* %p, i64 %exp, i64 %timeout) {
|
||||
%s = getelementptr i64, i64* %p, i32 3
|
||||
%t = call i32 @llvm.wasm.atomic.wait.i64(i64* %s, i64 %exp, i64 %timeout)
|
||||
ret i32 %t
|
||||
}
|
||||
|
||||
;===----------------------------------------------------------------------------
|
||||
; Notifies
|
||||
;===----------------------------------------------------------------------------
|
||||
|
||||
declare i64 @llvm.wasm.atomic.notify(i32*, i64)
|
||||
|
||||
; Basic notify.
|
||||
|
||||
; CHECK-LABEL: notify_no_offset:
|
||||
; CHECK: atomic.notify $push0=, 0($0), $1{{$}}
|
||||
; CHECK-NEXT: return $pop0{{$}}
|
||||
define i64 @notify_no_offset(i32* %p, i64 %notify_count) {
|
||||
%v = call i64 @llvm.wasm.atomic.notify(i32* %p, i64 %notify_count)
|
||||
ret i64 %v
|
||||
}
|
||||
|
||||
; With an nuw add, we can fold an offset.
|
||||
|
||||
; CHECK-LABEL: notify_with_folded_offset:
|
||||
; CHECK: atomic.notify $push0=, 24($0), $1{{$}}
|
||||
define i64 @notify_with_folded_offset(i32* %p, i64 %notify_count) {
|
||||
%q = ptrtoint i32* %p to i32
|
||||
%r = add nuw i32 %q, 24
|
||||
%s = inttoptr i32 %r to i32*
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; With an inbounds gep, we can fold an offset.
|
||||
|
||||
; CHECK-LABEL: notify_with_folded_gep_offset:
|
||||
; CHECK: atomic.notify $push0=, 24($0), $1{{$}}
|
||||
define i64 @notify_with_folded_gep_offset(i32* %p, i64 %notify_count) {
|
||||
%s = getelementptr inbounds i32, i32* %p, i32 6
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; We can't fold a negative offset though, even with an inbounds gep.
|
||||
|
||||
; CHECK-LABEL: notify_with_unfolded_gep_negative_offset:
|
||||
; CHECK: i32.const $push0=, -24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
|
||||
define i64 @notify_with_unfolded_gep_negative_offset(i32* %p, i64 %notify_count) {
|
||||
%s = getelementptr inbounds i32, i32* %p, i32 -6
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; Without nuw, and even with nsw, we can't fold an offset.
|
||||
|
||||
; CHECK-LABEL: notify_with_unfolded_offset:
|
||||
; CHECK: i32.const $push0=, 24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
|
||||
define i64 @notify_with_unfolded_offset(i32* %p, i64 %notify_count) {
|
||||
%q = ptrtoint i32* %p to i32
|
||||
%r = add nsw i32 %q, 24
|
||||
%s = inttoptr i32 %r to i32*
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; Without inbounds, we can't fold a gep offset.
|
||||
|
||||
; CHECK-LABEL: notify_with_unfolded_gep_offset:
|
||||
; CHECK: i32.const $push0=, 24{{$}}
|
||||
; CHECK: i32.add $push1=, $0, $pop0{{$}}
|
||||
; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
|
||||
define i64 @notify_with_unfolded_gep_offset(i32* %p, i64 %notify_count) {
|
||||
%s = getelementptr i32, i32* %p, i32 6
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; When notifying from a fixed address, materialize a zero.
|
||||
|
||||
; CHECK-LABEL: notify_from_numeric_address
|
||||
; CHECK: i32.const $push0=, 0{{$}}
|
||||
; CHECK: atomic.notify $push1=, 42($pop0), $0{{$}}
|
||||
define i64 @notify_from_numeric_address(i64 %notify_count) {
|
||||
%s = inttoptr i32 42 to i32*
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
; CHECK-LABEL: notify_from_global_address
|
||||
; CHECK: i32.const $push0=, 0{{$}}
|
||||
; CHECK: atomic.notify $push1=, gv($pop0), $0{{$}}
|
||||
define i64 @notify_from_global_address(i64 %notify_count) {
|
||||
%t = call i64 @llvm.wasm.atomic.notify(i32* @gv, i64 %notify_count)
|
||||
ret i64 %t
|
||||
}
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user