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[AsmPrinter] hoist %a output template to base class for ARM+Aarch64

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Summary:
X86 is quite complicated; so I intend to leave it as is. ARM+Aarch64 do
basically the same thing (Aarch64 did not correctly handle immediates,
ARM has a test llvm/test/CodeGen/ARM/2009-04-06-AsmModifier.ll that uses
%a with an immediate) for a flag that should be target independent
anyways.

Reviewers: echristo, peter.smith

Reviewed By: echristo

Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60841

llvm-svn: 358618
This commit is contained in:
Nick Desaulniers 2019-04-17 22:21:10 +00:00
parent 3c5ae68293
commit 85ce9e7ccd
3 changed files with 11 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
View File

@ -601,7 +601,8 @@ void AsmPrinter::PrintSpecial(const MachineInstr *MI, raw_ostream &OS,
/// PrintAsmOperand - Print the specified operand of MI, an INLINEASM
/// instruction, using the specified assembler variant. Targets should
/// override this to format as appropriate.
/// override this to format as appropriate for machine specific ExtraCodes
/// or when the arch-independent handling would be too complex otherwise.
bool AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &O) {
// Does this asm operand have a single letter operand modifier?
@ -613,18 +614,24 @@ bool AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
switch (ExtraCode[0]) {
default:
return true; // Unknown modifier.
case 'a': // Print as memory address.
if (MO.isReg()) {
PrintAsmMemoryOperand(MI, OpNo, nullptr, O);
return false;
}
LLVM_FALLTHROUGH; // GCC allows '%a' to behave like '%c' with immediates.
case 'c': // Substitute immediate value without immediate syntax
if (MO.getType() != MachineOperand::MO_Immediate)
if (!MO.isImm())
return true;
O << MO.getImm();
return false;
case 'n': // Negate the immediate constant.
if (MO.getType() != MachineOperand::MO_Immediate)
if (!MO.isImm())
return true;
O << -MO.getImm();
return false;
case 's': // The GCC deprecated s modifier
if (MO.getType() != MachineOperand::MO_Immediate)
if (!MO.isImm())
return true;
O << ((32 - MO.getImm()) & 31);
return false;

3
lib/Target/AArch64/AArch64AsmPrinter.cpp
View File

@ -504,9 +504,6 @@ bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
switch (ExtraCode[0]) {
default:
return true; // Unknown modifier.
case 'a': // Print 'a' modifier
PrintAsmMemoryOperand(MI, OpNum, ExtraCode, O);
return false;
case 'w': // Print W register
case 'x': // Print X register
if (MO.isReg())

11
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -264,17 +264,6 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
default:
// See if this is a generic print operand
return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
case 'a': // Print as a memory address.
if (MI->getOperand(OpNum).isReg()) {
O << "["
<< ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
<< "]";
return false;
} else if (MI->getOperand(OpNum).isImm()) {
O << MI->getOperand(OpNum).getImm();
return false;
}
return true;
case 'P': // Print a VFP double precision register.
case 'q': // Print a NEON quad precision register.
printOperand(MI, OpNum, O);