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Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.

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If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

llvm-svn: 122521
This commit is contained in:
Bob Wilson 2010-12-23 22:45:49 +00:00
parent 55b9ff9dd9
commit 85dbc89f44
2 changed files with 4 additions and 0 deletions
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3
lib/Target/ARM/ARMISelLowering.cpp
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@ -4433,6 +4433,9 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
case ARM::BCCi64:
case ARM::BCCZi64: {
// If there is an unconditional branch to the other successor, remove it.
BB->erase(llvm::next(MachineBasicBlock::iterator(MI)), BB->end());
// Compare both parts that make up the double comparison separately for
// equality.
bool RHSisZero = MI->getOpcode() == ARM::BCCZi64;

1
test/CodeGen/ARM/fpcmp-opt.ll
View File

@ -38,6 +38,7 @@ entry:
; FINITE: t2:
; FINITE-NOT: vldr
; FINITE: ldrd r0, [r0]
; FINITE-NOT: b LBB
; FINITE: cmp r0, #0
; FINITE: cmpeq r1, #0
; FINITE-NOT: vcmpe.f32