mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 20:51:52 +01:00
Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. llvm-svn: 148437
This commit is contained in:
parent
acb9eccef3
commit
85ef53eb8d
@ -107,6 +107,9 @@ bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
|
||||
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
|
||||
break;
|
||||
}
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
// Ignore call clobbers.
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
@ -150,7 +150,7 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
||||
case MachineOperand::MO_BlockAddress:
|
||||
MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
|
||||
break;
|
||||
case MachineOperand::MO_FPImmediate:
|
||||
case MachineOperand::MO_FPImmediate: {
|
||||
bool ignored;
|
||||
APFloat FVal = MO.getFPImm()->getValueAPF();
|
||||
FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
|
||||
@ -160,6 +160,9 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
||||
MCOp = MCOperand::CreateImm(Val);
|
||||
break;
|
||||
}
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
continue;
|
||||
}
|
||||
|
||||
OutMI.addOperand(MCOp);
|
||||
}
|
||||
|
@ -143,6 +143,9 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
||||
break;
|
||||
case MachineOperand::MO_BlockAddress:
|
||||
MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
|
||||
break;
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
continue;
|
||||
}
|
||||
|
||||
OutMI.addOperand(MCOp);
|
||||
|
@ -192,6 +192,8 @@ MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO,
|
||||
case MachineOperand::MO_ConstantPoolIndex:
|
||||
case MachineOperand::MO_BlockAddress:
|
||||
return LowerSymbolOperand(MO, MOTy, offset);
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
break;
|
||||
}
|
||||
|
||||
return MCOperand();
|
||||
|
@ -166,6 +166,8 @@ void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
||||
MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP,
|
||||
isDarwin);
|
||||
break;
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
continue;
|
||||
}
|
||||
|
||||
OutMI.addOperand(MCOp);
|
||||
|
@ -335,6 +335,9 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
||||
MCOp = LowerSymbolOperand(MO,
|
||||
AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
|
||||
break;
|
||||
case MachineOperand::MO_RegisterMask:
|
||||
// Ignore call clobbers.
|
||||
continue;
|
||||
}
|
||||
|
||||
OutMI.addOperand(MCOp);
|
||||
|
Loading…
x
Reference in New Issue
Block a user