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random code cleanups.

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llvm-svn: 74962
This commit is contained in:
Chris Lattner 2009-07-07 22:49:15 +00:00
parent a754f344b2
commit 8604f71f91
1 changed files with 28 additions and 27 deletions
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41
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -225,10 +225,10 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
SDValue RHS = GetScalarizedVector(N->getOperand(1)); SDValue RHS = GetScalarizedVector(N->getOperand(1));
MVT NVT = N->getValueType(0).getVectorElementType(); MVT NVT = N->getValueType(0).getVectorElementType();
MVT SVT = TLI.getSetCCResultType(LHS.getValueType()); MVT SVT = TLI.getSetCCResultType(LHS.getValueType());
DebugLoc dl = N->getDebugLoc(); DebugLoc DL = N->getDebugLoc();
// Turn it into a scalar SETCC. // Turn it into a scalar SETCC.
SDValue Res = DAG.getNode(ISD::SETCC, dl, SVT, LHS, RHS, N->getOperand(2)); SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
// VSETCC always returns a sign-extended value, while SETCC may not. The // VSETCC always returns a sign-extended value, while SETCC may not. The
// SETCC result type may not match the vector element type. Correct these. // SETCC result type may not match the vector element type. Correct these.
@ -237,19 +237,19 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
// Ensure the SETCC result is sign-extended. // Ensure the SETCC result is sign-extended.
if (TLI.getBooleanContents() != if (TLI.getBooleanContents() !=
TargetLowering::ZeroOrNegativeOneBooleanContent) TargetLowering::ZeroOrNegativeOneBooleanContent)
Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, SVT, Res, Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
DAG.getValueType(MVT::i1)); DAG.getValueType(MVT::i1));
// Truncate to the final type. // Truncate to the final type.
return DAG.getNode(ISD::TRUNCATE, dl, NVT, Res); return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
} else { }
// The SETCC result type is smaller than the vector element type. // The SETCC result type is smaller than the vector element type.
// If the SetCC result is not sign-extended, chop it down to MVT::i1. // If the SetCC result is not sign-extended, chop it down to MVT::i1.
if (TLI.getBooleanContents() != if (TLI.getBooleanContents() !=
TargetLowering::ZeroOrNegativeOneBooleanContent) TargetLowering::ZeroOrNegativeOneBooleanContent)
Res = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Res); Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
// Sign extend to the final type. // Sign extend to the final type.
return DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, Res); return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
}
} }
SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) { SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
SDValue LHS = GetScalarizedVector(N->getOperand(0)); SDValue LHS = GetScalarizedVector(N->getOperand(0));
@ -278,19 +278,18 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
N->dump(&DAG); cerr << "\n"; N->dump(&DAG); cerr << "\n";
#endif #endif
assert(0 && "Do not know how to scalarize this operator's operand!"); assert(0 && "Do not know how to scalarize this operator's operand!");
abort();
case ISD::BIT_CONVERT: case ISD::BIT_CONVERT:
Res = ScalarizeVecOp_BIT_CONVERT(N); break; Res = ScalarizeVecOp_BIT_CONVERT(N);
break;
case ISD::CONCAT_VECTORS: case ISD::CONCAT_VECTORS:
Res = ScalarizeVecOp_CONCAT_VECTORS(N); break; Res = ScalarizeVecOp_CONCAT_VECTORS(N);
break;
case ISD::EXTRACT_VECTOR_ELT: case ISD::EXTRACT_VECTOR_ELT:
Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N); break; Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
break;
case ISD::STORE: case ISD::STORE:
Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo); break; Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
break;
} }
} }
@ -1036,7 +1035,6 @@ SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
if (IdxVal < LoElts) if (IdxVal < LoElts)
return DAG.UpdateNodeOperands(SDValue(N, 0), Lo, Idx); return DAG.UpdateNodeOperands(SDValue(N, 0), Lo, Idx);
else
return DAG.UpdateNodeOperands(SDValue(N, 0), Hi, return DAG.UpdateNodeOperands(SDValue(N, 0), Hi,
DAG.getConstant(IdxVal - LoElts, DAG.getConstant(IdxVal - LoElts,
Idx.getValueType())); Idx.getValueType()));
@ -1129,8 +1127,11 @@ void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break; case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break; case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
case ISD::VECTOR_SHUFFLE: case ISD::VECTOR_SHUFFLE:
Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N)); break; Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
case ISD::VSETCC: Res = WidenVecRes_VSETCC(N); break; break;
case ISD::VSETCC:
Res = WidenVecRes_VSETCC(N);
break;
case ISD::ADD: case ISD::ADD:
case ISD::AND: case ISD::AND: