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Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.

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llvm-svn: 138739
This commit is contained in:
Owen Anderson 2011-08-29 17:17:09 +00:00
parent 026fa4da72
commit 8719e2c1c3
2 changed files with 21 additions and 2 deletions
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15
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -717,7 +717,7 @@ public:
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
if (!CE) return false;
int64_t Val = CE->getValue();
return Val > -256 && Val < 256;
return (Val > -256 && Val < 256) || (Val == INT32_MIN);
}
bool isMSRMask() const { return Kind == MSRMask; }
@ -1106,6 +1106,7 @@ public:
assert(CE && "non-constant post-idx-imm8 operand!");
int Imm = CE->getValue();
bool isAdd = Imm >= 0;
if (Imm == INT32_MIN) Imm = 0;
Imm = (Imm < 0 ? -Imm : Imm) | (int)isAdd << 8;
Inst.addOperand(MCOperand::CreateImm(Imm));
}
@ -2746,17 +2747,27 @@ bool ARMAsmParser::parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
return parseMemory(Operands);
case AsmToken::LCurly:
return parseRegisterList(Operands);
case AsmToken::Hash:
case AsmToken::Hash: {
// #42 -> immediate.
// TODO: ":lower16:" and ":upper16:" modifiers after # before immediate
S = Parser.getTok().getLoc();
Parser.Lex();
bool isNegative = Parser.getTok().is(AsmToken::Minus);
const MCExpr *ImmVal;
if (getParser().ParseExpression(ImmVal))
return true;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ImmVal);
if (!CE) {
Error(S, "constant expression expected");
return MatchOperand_ParseFail;
}
int32_t Val = CE->getValue();
if (isNegative && Val == 0)
ImmVal = MCConstantExpr::Create(INT32_MIN, getContext());
E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
Operands.push_back(ARMOperand::CreateImm(ImmVal, S, E));
return false;
}
case AsmToken::Colon: {
// ":lower16:" and ":upper16:" expression prefixes
// FIXME: Check it's an expression prefix,

8
test/MC/ARM/basic-arm-instructions.s
View File

@ -687,6 +687,14 @@ Lforward:
@ CHECK: ldrex r1, [r7] @ encoding: [0x9f,0x1f,0x97,0xe1]
@ CHECK: ldrexd r6, r7, [r8] @ encoding: [0x9f,0x6f,0xb8,0xe1]
@------------------------------------------------------------------------------
@ LDRHT
@------------------------------------------------------------------------------
ldrhthi r8, [r11], #-0
ldrhthi r8, [r11], #0
@ CHECK: ldrhthi r8, [r11], #-0 @ encoding: [0xb0,0x80,0x7b,0x80]
@ CHECK: ldrhthi r8, [r11], #0 @ encoding: [0xb0,0x80,0xfb,0x80]
@------------------------------------------------------------------------------
@ FIXME: LSL