RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00
Code Issues Projects Releases Wiki Activity

[SimplifyCFG] FoldValueComparisonIntoPredecessors(): drop reachable errneous assert

Browse Source 
I have added it in d15d81c because it *seemed* correct, was holding
for all the tests so far, and was validating the fix added in the same
commit, but as David Major is pointing out (with a reproducer),
the assertion isn't really correct after all. So remove it.

Note that the d15d81c still fine.
This commit is contained in:
Roman Lebedev 2021-01-07 18:04:37 +03:00
parent 237baae3ce
commit 8800a9063b
2 changed files with 35 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Transforms/Utils/SimplifyCFG.cpp
View File

@ -1261,7 +1261,6 @@ bool SimplifyCFGOpt::FoldValueComparisonIntoPredecessors(Instruction *TI,
// Okay, at this point, we know which new successor Pred will get. Make
// sure we update the number of entries in the PHI nodes for these
// successors.
assert(!NewSuccessors.empty() && "Should be adding some new successors.");
for (const std::pair<BasicBlock *, int /*Num*/> &NewSuccessor :
NewSuccessors) {
for (auto I : seq(0, NewSuccessor.second)) {

35
test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredecessors-no-new-successors.ll Normal file
View File

@ -0,0 +1,35 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
define void @widget(i32 %arg) {
; CHECK-LABEL: @widget(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[ARG:%.*]], 2
; CHECK-NEXT: br i1 [[SWITCH]], label [[BB2:%.*]], label [[INFLOOP:%.*]]
; CHECK: bb2:
; CHECK-NEXT: ret void
; CHECK: infloop:
; CHECK-NEXT: br label [[INFLOOP]]
;
bb:
%tmp = icmp eq i32 %arg, 0
br i1 %tmp, label %bb2, label %bb1
bb1: ; preds = %bb1
%tmp4 = icmp eq i32 %arg, 1
br i1 %tmp4, label %bb6, label %bb5
bb5: ; preds = %bb5, %bb5
switch i32 %arg, label %bb5 [
i32 0, label %bb9
]
bb2:
ret void
bb6: ; preds = %bb1
ret void
bb9: ; preds = %bb5
ret void
}