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[AArch64 NEON] Fixed fused multiply negate add/sub patterns
The correct pattern matching should be: - fnmadd is (-Ra) + (-Rn)*Rm which should be matched as: fma (fneg node:$Rn), node:$Rm, (fneg node:$Ra) and as (f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul FPR32:$Rn, FPR32:$Rm)))) - fnmsub is (-Ra) + Rn*Rm which should be matched as fma node:$Rn, node:$Rm, (fneg node:$Ra) and as (f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra)))) llvm-svn: 197928
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Ana Pazos
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3dee74d75c
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@ -2172,9 +2172,9 @@ defm FSUB : A64I_fpdp2sizes<0b0011, "fsub", fsub>;
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def fmsub : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra),
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(fma (fneg node:$Rn), node:$Rm, node:$Ra)>;
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def fnmadd : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra),
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(fma node:$Rn, node:$Rm, (fneg node:$Ra))>;
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def fnmsub : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra),
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(fma node:$Rn, node:$Rm, (fneg node:$Ra))>;
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def fnmadd : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra),
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(fma (fneg node:$Rn), node:$Rm, (fneg node:$Ra))>;
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class A64I_fpdp3Impl<string asmop, RegisterClass FPR, ValueType VT,
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@ -2202,18 +2202,18 @@ def : Pat<(f32 (fadd FPR32:$Ra, (f32 (fmul FPR32:$Rn, FPR32:$Rm)))),
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(FMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>;
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def : Pat<(f32 (fsub FPR32:$Ra, (f32 (fmul FPR32:$Rn, FPR32:$Rm)))),
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(FMSUBssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>;
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def : Pat<(f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra)),
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(FNMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>;
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def : Pat<(f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul FPR32:$Rn, FPR32:$Rm)))),
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(FNMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>;
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def : Pat<(f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra)),
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(FNMSUBssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>;
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def : Pat<(f64 (fadd FPR64:$Ra, (f64 (fmul FPR64:$Rn, FPR64:$Rm)))),
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(FMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>;
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def : Pat<(f64 (fsub FPR64:$Ra, (f64 (fmul FPR64:$Rn, FPR64:$Rm)))),
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(FMSUBdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>;
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def : Pat<(f64 (fsub (f64 (fmul FPR64:$Rn, FPR64:$Rm)), FPR64:$Ra)),
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(FNMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>;
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def : Pat<(f64 (fsub (f64 (fneg FPR64:$Ra)), (f64 (fmul FPR64:$Rn, FPR64:$Rm)))),
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(FNMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>;
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def : Pat<(f64 (fsub (f64 (fmul FPR64:$Rn, FPR64:$Rm)), FPR64:$Ra)),
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(FNMSUBdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>;
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}
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@ -26,8 +26,9 @@ define float @test_fmsub(float %a, float %b, float %c) {
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define float @test_fnmadd(float %a, float %b, float %c) {
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; CHECK-LABEL: test_fnmadd:
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; CHECK-NOFAST-LABEL: test_fnmadd:
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%nega = fsub float -0.0, %a
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%negc = fsub float -0.0, %c
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%val = call float @llvm.fma.f32(float %a, float %b, float %negc)
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%val = call float @llvm.fma.f32(float %nega, float %b, float %negc)
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; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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ret float %val
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@ -36,9 +37,8 @@ define float @test_fnmadd(float %a, float %b, float %c) {
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define float @test_fnmsub(float %a, float %b, float %c) {
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; CHECK-LABEL: test_fnmsub:
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; CHECK-NOFAST-LABEL: test_fnmsub:
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%nega = fsub float -0.0, %a
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%negc = fsub float -0.0, %c
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%val = call float @llvm.fma.f32(float %nega, float %b, float %negc)
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%val = call float @llvm.fma.f32(float %a, float %b, float %negc)
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; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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ret float %val
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@ -66,8 +66,9 @@ define double @testd_fmsub(double %a, double %b, double %c) {
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define double @testd_fnmadd(double %a, double %b, double %c) {
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; CHECK-LABEL: testd_fnmadd:
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; CHECK-NOFAST-LABEL: testd_fnmadd:
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%nega = fsub double -0.0, %a
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%negc = fsub double -0.0, %c
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%val = call double @llvm.fma.f64(double %a, double %b, double %negc)
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%val = call double @llvm.fma.f64(double %nega, double %b, double %negc)
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; CHECK: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
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; CHECK-NOFAST: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
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ret double %val
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@ -76,9 +77,8 @@ define double @testd_fnmadd(double %a, double %b, double %c) {
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define double @testd_fnmsub(double %a, double %b, double %c) {
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; CHECK-LABEL: testd_fnmsub:
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; CHECK-NOFAST-LABEL: testd_fnmsub:
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%nega = fsub double -0.0, %a
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%negc = fsub double -0.0, %c
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%val = call double @llvm.fma.f64(double %nega, double %b, double %negc)
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%val = call double @llvm.fma.f64(double %a, double %b, double %negc)
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; CHECK: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
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; CHECK-NOFAST: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
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ret double %val
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@ -113,12 +113,13 @@ define float @test_fnmadd_unfused(float %a, float %b, float %c) {
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; CHECK-NOFAST-LABEL: test_fnmadd_unfused:
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%nega = fsub float -0.0, %a
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%prod = fmul float %b, %c
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%sum = fadd float %nega, %prod
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%diff = fsub float %nega, %prod
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; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST-NOT: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: fsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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ret float %sum
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; CHECK-NOFAST: ret
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ret float %diff
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}
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define float @test_fnmsub_unfused(float %a, float %b, float %c) {
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@ -126,12 +127,11 @@ define float @test_fnmsub_unfused(float %a, float %b, float %c) {
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; CHECK-NOFAST-LABEL: test_fnmsub_unfused:
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%nega = fsub float -0.0, %a
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%prod = fmul float %b, %c
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%diff = fsub float %nega, %prod
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%sum = fadd float %nega, %prod
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; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST-NOT: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST-DAG: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST-DAG: fneg {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST-DAG: fsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: ret
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ret float %diff
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; CHECK-NOFAST: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFAST: fsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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ret float %sum
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}
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@ -110,3 +110,4 @@ define <2 x double> @fmuladd2xdouble_fused(<2 x double> %A, <2 x double> %B, <2
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%val = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %A, <2 x double> %B, <2 x double> %C)
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ret <2 x double> %val
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}
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